Originally, they were disabled in
48fb95de1e456569deed5096924e617d511cf109 because Intel IGC compiler was
triggering them while doing JIT compilation of NBNXM kernels from the
intermediate bytecode.
Now:
- The problem was fixed in IGC 1.0.7683 (compute-runtime 21.24.20098).
- Either NBNXM kernels or the DPC++ compiler changed, and the generated
SPIR-V code does not trigger FPEs even for earlier IGC versions.
*
* Currently, it returns true unless any of the following conditions are met:
* - release build,
- * - SYCL build (Intel IGC, at least 1.0.5964, raises FP exceptions in JIT compilation),
- * - - See https://github.com/intel/intel-graphics-compiler/issues/164
* - compilers with known buggy FP exception support (clang with any optimization)
* or suspected buggy FP exception support (gcc 7.* with optimization).
*
return false; // Release build
#elif ((defined __clang__ || (defined(__GNUC__) && __GNUC__ == 7)) && defined __OPTIMIZE__)
return false; // Buggy compiler
-#elif GMX_GPU_SYCL
- return false; // avoid spurious FPE during SYCL JIT
#else
return true;
#endif