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43 # define _GNU_SOURCE 1
52 #ifdef GMX_NATIVE_WINDOWS
53 /* MSVC definition for __cpuid() */
57 /* sysinfo functions */
61 /* sysconf() definition */
65 #include "gromacs/legacyheaders/gmx_cpuid.h"
69 /* For convenience, and to enable configure-time invocation, we keep all architectures
70 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
73 /* OK, it is x86, but can we execute cpuid? */
74 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)))
75 # define GMX_CPUID_X86
79 /* Global constant character strings corresponding to our enumerated types */
81 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
93 gmx_cpuid_vendor_string_alternative[GMX_CPUID_NVENDORS] =
100 "ibm", /* Used on BlueGene/Q */
105 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
147 gmx_cpuid_simd_string[GMX_CPUID_NSIMD] =
163 /* Max length of brand string */
164 #define GMX_CPUID_STRLEN 256
167 /* Contents of the abstract datatype */
170 enum gmx_cpuid_vendor vendor;
171 char brand[GMX_CPUID_STRLEN];
175 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
176 char feature[GMX_CPUID_NFEATURES];
178 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
179 * operating systems and sometimes even settings. For most other architectures you can likely just check
180 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
182 int have_cpu_topology;
183 int nproc; /* total number of logical processors from OS */
185 int ncores_per_package;
186 int nhwthreads_per_core;
188 int * core_id; /* Local core id in each package */
189 int * hwthread_id; /* Local hwthread id in each core */
190 int * locality_order; /* Processor indices sorted in locality order */
194 /* Simple routines to access the data structure. The initialization routine is
195 * further down since that needs to call other static routines in this file.
197 enum gmx_cpuid_vendor
198 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
200 return cpuid->vendor;
205 gmx_cpuid_brand (gmx_cpuid_t cpuid)
211 gmx_cpuid_family (gmx_cpuid_t cpuid)
213 return cpuid->family;
217 gmx_cpuid_model (gmx_cpuid_t cpuid)
223 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
225 return cpuid->stepping;
229 gmx_cpuid_feature (gmx_cpuid_t cpuid,
230 enum gmx_cpuid_feature feature)
232 return (cpuid->feature[feature] != 0);
238 /* What type of SIMD was compiled in, if any? */
239 #ifdef GMX_SIMD_X86_AVX2_256
240 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX2_256;
241 #elif defined GMX_SIMD_X86_AVX_256
242 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_256;
243 #elif defined GMX_SIMD_X86_AVX_128_FMA
244 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
245 #elif defined GMX_SIMD_X86_SSE4_1
246 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE4_1;
247 #elif defined GMX_SIMD_X86_SSE2
248 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE2;
249 #elif defined GMX_SIMD_ARM_NEON
250 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_ARM_NEON;
251 #elif defined GMX_SIMD_ARM_NEON_ASIMD
252 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_ARM_NEON_ASIMD;
253 #elif defined GMX_SIMD_SPARC64_HPC_ACE
254 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
255 #elif defined GMX_SIMD_IBM_QPX
256 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_IBM_QPX;
257 #elif defined GMX_SIMD_REFERENCE
258 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_REFERENCE;
260 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_NONE;
266 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
267 * contents of register output is returned. See Intel/AMD docs for details.
269 * This version supports extended information where we can also have an input
270 * value in the ecx register. This is ignored for most levels, but some of them
271 * (e.g. level 0xB on Intel) use it.
274 execute_x86cpuid(unsigned int level,
283 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
284 * if the compiler handles GNU-style inline assembly.
287 #if (defined _MSC_VER)
290 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
291 /* MSVC 9.0 SP1 or later */
292 __cpuidex(CPUInfo, level, ecxval);
295 __cpuid(CPUInfo, level);
296 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
297 rc = (ecxval > 0) ? -1 : 0;
304 #elif (defined GMX_X86_GCC_INLINE_ASM)
305 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
306 * but there might be more options added in the future.
312 #if defined(__i386__) && defined(__PIC__)
313 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
314 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
316 "xchgl %%ebx, %1 \n\t"
317 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
319 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
320 __asm__ __volatile__ ("cpuid \n\t"
321 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
326 * Apparently this is an x86 platform where we don't know how to call cpuid.
328 * This is REALLY bad, since we will lose all Gromacs SIMD support.
341 /* Identify CPU features common to Intel & AMD - mainly brand string,
342 * version and some features. Vendor has already been detected outside this.
345 cpuid_check_common_x86(gmx_cpuid_t cpuid)
347 int fn, max_stdfn, max_extfn;
348 unsigned int eax, ebx, ecx, edx;
349 char str[GMX_CPUID_STRLEN];
352 /* Find largest standard/extended function input value */
353 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
355 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
359 if (max_extfn >= 0x80000005)
361 /* Get CPU brand string */
362 for (fn = 0x80000002; fn < 0x80000005; fn++)
364 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
366 memcpy(p+4, &ebx, 4);
367 memcpy(p+8, &ecx, 4);
368 memcpy(p+12, &edx, 4);
373 /* Remove empty initial space */
375 while (isspace(*(p)))
379 strncpy(cpuid->brand, p, GMX_CPUID_STRLEN);
383 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_STRLEN);
386 /* Find basic CPU properties */
389 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
391 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
392 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
393 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
394 cpuid->stepping = (eax & 0x0000000F);
396 /* Feature flags common to AMD and intel */
397 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
398 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
399 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
400 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
401 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
402 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
403 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
404 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
405 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
406 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
407 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
408 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
410 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
411 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
412 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
413 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
414 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
415 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
416 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
417 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
418 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
424 cpuid->stepping = -1;
427 if (max_extfn >= 0x80000001)
429 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
430 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
431 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
432 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
435 if (max_extfn >= 0x80000007)
437 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
438 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
443 /* This routine returns the number of unique different elements found in the array,
444 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
445 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
446 * number of unique elements.
449 cpuid_renumber_elements(int *data, int n)
452 int i, j, nunique, found;
454 unique = malloc(sizeof(int)*n);
457 for (i = 0; i < n; i++)
459 for (j = 0, found = 0; j < nunique && !found; j++)
461 found = (data[i] == unique[j]);
465 /* Insert in sorted order! */
466 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
468 unique[j] = unique[j-1];
474 for (i = 0; i < n; i++)
476 for (j = 0; j < nunique; j++)
478 if (data[i] == unique[j])
488 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
490 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
491 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
492 * we know is that the part for each thread/core/package is unique, and how many bits are
493 * reserved for that part.
494 * This routine does internal renumbering so we get continuous indices, and also
495 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
496 * Returns: 0 on success, non-zero on failure.
499 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
502 int hwthread_mask, core_mask_after_shift;
504 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
505 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
506 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
507 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
509 hwthread_mask = (1 << hwthread_bits) - 1;
510 core_mask_after_shift = (1 << core_bits) - 1;
512 for (i = 0; i < cpuid->nproc; i++)
514 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
515 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
516 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
519 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
520 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
521 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
523 /* now check for consistency */
524 if ( (cpuid->npackages * cpuid->ncores_per_package *
525 cpuid->nhwthreads_per_core) != cpuid->nproc)
527 /* the packages/cores-per-package/hwthreads-per-core counts are
532 /* Create a locality order array, i.e. first all resources in package0, which in turn
533 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
536 for (i = 0; i < cpuid->nproc; i++)
538 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
539 cpuid->locality_order[idx] = i;
545 /* Detection of AMD-specific CPU features */
547 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
549 int max_stdfn, max_extfn, ret;
550 unsigned int eax, ebx, ecx, edx;
551 int hwthread_bits, core_bits;
554 cpuid_check_common_x86(cpuid);
556 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
559 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
562 if (max_extfn >= 0x80000001)
564 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
566 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
567 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
568 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
569 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
572 /* Query APIC information on AMD */
573 if (max_extfn >= 0x80000008)
575 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
578 cpu_set_t cpuset, save_cpuset;
579 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
580 apic_id = malloc(sizeof(int)*cpuid->nproc);
581 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
582 /* Get APIC id from each core */
584 for (i = 0; i < cpuid->nproc; i++)
587 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
588 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
589 apic_id[i] = ebx >> 24;
592 /* Reset affinity to the value it had when calling this routine */
593 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
594 #define CPUID_HAVE_APIC
595 #elif defined GMX_NATIVE_WINDOWS
599 unsigned int save_affinity, affinity;
600 GetSystemInfo( &sysinfo );
601 cpuid->nproc = sysinfo.dwNumberOfProcessors;
602 apic_id = malloc(sizeof(int)*cpuid->nproc);
603 /* Get previous affinity mask */
604 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
605 for (i = 0; i < cpuid->nproc; i++)
607 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
609 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
610 apic_id[i] = ebx >> 24;
612 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
613 #define CPUID_HAVE_APIC
615 #ifdef CPUID_HAVE_APIC
616 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
618 /* Get number of core bits in apic ID - try modern extended method first */
619 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
620 core_bits = (ecx >> 12) & 0xf;
623 /* Legacy method for old single/dual core AMD CPUs */
625 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
630 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
632 cpuid->have_cpu_topology = (ret == 0);
638 /* Detection of Intel-specific CPU features */
640 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
642 unsigned int max_stdfn, max_extfn, ret;
643 unsigned int eax, ebx, ecx, edx;
644 unsigned int max_logical_cores, max_physical_cores;
645 int hwthread_bits, core_bits;
648 cpuid_check_common_x86(cpuid);
650 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
653 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
658 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
659 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
660 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
661 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
662 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
667 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
668 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
671 /* Check whether Hyper-Threading is enabled, not only supported */
672 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
674 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
675 max_logical_cores = (ebx >> 16) & 0x0FF;
676 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
677 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
679 /* Clear HTT flag if we only have 1 logical core per physical */
680 if (max_logical_cores/max_physical_cores < 2)
682 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
686 if (max_stdfn >= 0xB)
688 /* Query x2 APIC information from cores */
689 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
692 cpu_set_t cpuset, save_cpuset;
693 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
694 apic_id = malloc(sizeof(int)*cpuid->nproc);
695 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
696 /* Get x2APIC ID from each hardware thread */
698 for (i = 0; i < cpuid->nproc; i++)
701 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
702 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
706 /* Reset affinity to the value it had when calling this routine */
707 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
708 #define CPUID_HAVE_APIC
709 #elif defined GMX_NATIVE_WINDOWS
713 unsigned int save_affinity, affinity;
714 GetSystemInfo( &sysinfo );
715 cpuid->nproc = sysinfo.dwNumberOfProcessors;
716 apic_id = malloc(sizeof(int)*cpuid->nproc);
717 /* Get previous affinity mask */
718 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
719 for (i = 0; i < cpuid->nproc; i++)
721 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
723 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
726 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
727 #define CPUID_HAVE_APIC
729 #ifdef CPUID_HAVE_APIC
730 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
731 hwthread_bits = eax & 0x1F;
732 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
733 core_bits = (eax & 0x1F) - hwthread_bits;
734 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
736 cpuid->have_cpu_topology = (ret == 0);
741 #endif /* GMX_CPUID_X86 */
746 chomp_substring_before_colon(const char *in, char *s, int maxlength)
749 strncpy(s, in, maxlength);
754 while (isspace(*(--p)) && (p >= s))
766 chomp_substring_after_colon(const char *in, char *s, int maxlength)
769 if ( (p = strchr(in, ':')) != NULL)
776 strncpy(s, p, maxlength);
778 while (isspace(*(--p)) && (p >= s))
790 cpuid_check_arm(gmx_cpuid_t cpuid)
792 #if defined(__linux__) || defined(__linux)
794 char buffer[GMX_CPUID_STRLEN], buffer2[GMX_CPUID_STRLEN], buffer3[GMX_CPUID_STRLEN];
796 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
798 while ( (fgets(buffer, sizeof(buffer), fp) != NULL))
800 chomp_substring_before_colon(buffer, buffer2, GMX_CPUID_STRLEN);
801 chomp_substring_after_colon(buffer, buffer3, GMX_CPUID_STRLEN);
803 if (!strcmp(buffer2, "Processor"))
805 strncpy(cpuid->brand, buffer3, GMX_CPUID_STRLEN);
807 else if (!strcmp(buffer2, "CPU architecture"))
809 cpuid->family = strtol(buffer3, NULL, 10);
810 if (!strcmp(buffer3, "AArch64"))
815 else if (!strcmp(buffer2, "CPU part"))
817 cpuid->model = strtol(buffer3, NULL, 16);
819 else if (!strcmp(buffer2, "CPU revision"))
821 cpuid->stepping = strtol(buffer3, NULL, 10);
823 else if (!strcmp(buffer2, "Features") && strstr(buffer3, "neon"))
825 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON] = 1;
827 else if (!strcmp(buffer2, "Features") && strstr(buffer3, "asimd"))
829 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON_ASIMD] = 1;
836 /* Strange 64-bit non-linux platform. However, since NEON ASIMD is present on all
837 * implementations of AArch64 this far, we assume it is present for now.
839 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON_ASIMD] = 1;
841 /* Strange 32-bit non-linux platform. We cannot assume that neon is present. */
842 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON] = 0;
849 /* Try to find the vendor of the current CPU, so we know what specific
850 * detection routine to call.
852 static enum gmx_cpuid_vendor
853 cpuid_check_vendor(void)
855 enum gmx_cpuid_vendor i, vendor;
856 /* Register data used on x86 */
857 unsigned int eax, ebx, ecx, edx;
858 char vendorstring[13];
860 char buffer[GMX_CPUID_STRLEN];
861 char before_colon[GMX_CPUID_STRLEN];
862 char after_colon[GMX_CPUID_STRLEN];
864 /* Set default first */
865 vendor = GMX_CPUID_VENDOR_UNKNOWN;
868 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
870 memcpy(vendorstring, &ebx, 4);
871 memcpy(vendorstring+4, &edx, 4);
872 memcpy(vendorstring+8, &ecx, 4);
874 vendorstring[12] = '\0';
876 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
878 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
883 #elif defined(__linux__) || defined(__linux)
884 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
885 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
887 while ( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer, sizeof(buffer), fp) != NULL))
889 chomp_substring_before_colon(buffer, before_colon, sizeof(before_colon));
890 /* Intel/AMD use "vendor_id", IBM "vendor"(?) or "model". Fujitsu "manufacture".
891 * On ARM there does not seem to be a vendor, but ARM or AArch64 is listed in the Processor string.
892 * Add others if you have them!
894 if (!strcmp(before_colon, "vendor_id")
895 || !strcmp(before_colon, "vendor")
896 || !strcmp(before_colon, "manufacture")
897 || !strcmp(before_colon, "model")
898 || !strcmp(before_colon, "Processor"))
900 chomp_substring_after_colon(buffer, after_colon, sizeof(after_colon));
901 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
903 /* Be liberal and accept if we find the vendor
904 * string (or alternative string) anywhere. Using
905 * strcasestr() would be non-portable. */
906 if (strstr(after_colon, gmx_cpuid_vendor_string[i])
907 || strstr(after_colon, gmx_cpuid_vendor_string_alternative[i]))
916 #elif defined(__arm__) || defined (__arm) || defined(__aarch64__)
917 /* If we are using ARM on something that is not linux we have to trust the compiler,
918 * and we cannot get the extra info that might be present in /proc/cpuinfo.
920 vendor = GMX_CPUID_VENDOR_ARM;
928 gmx_cpuid_topology(gmx_cpuid_t cpuid,
931 int * ncores_per_package,
932 int * nhwthreads_per_core,
933 const int ** package_id,
934 const int ** core_id,
935 const int ** hwthread_id,
936 const int ** locality_order)
940 if (cpuid->have_cpu_topology)
942 *nprocessors = cpuid->nproc;
943 *npackages = cpuid->npackages;
944 *ncores_per_package = cpuid->ncores_per_package;
945 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
946 *package_id = cpuid->package_id;
947 *core_id = cpuid->core_id;
948 *hwthread_id = cpuid->hwthread_id;
949 *locality_order = cpuid->locality_order;
960 enum gmx_cpuid_x86_smt
961 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
963 enum gmx_cpuid_x86_smt rc;
965 if (cpuid->have_cpu_topology)
967 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
969 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
971 rc = GMX_CPUID_X86_SMT_DISABLED;
975 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
982 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
987 char buffer[GMX_CPUID_STRLEN], buffer2[GMX_CPUID_STRLEN];
990 cpuid = malloc(sizeof(*cpuid));
994 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
996 cpuid->feature[i] = 0;
999 cpuid->have_cpu_topology = 0;
1001 cpuid->npackages = 0;
1002 cpuid->ncores_per_package = 0;
1003 cpuid->nhwthreads_per_core = 0;
1004 cpuid->package_id = NULL;
1005 cpuid->core_id = NULL;
1006 cpuid->hwthread_id = NULL;
1007 cpuid->locality_order = NULL;
1009 cpuid->vendor = cpuid_check_vendor();
1011 switch (cpuid->vendor)
1013 #ifdef GMX_CPUID_X86
1014 case GMX_CPUID_VENDOR_INTEL:
1015 cpuid_check_intel_x86(cpuid);
1017 case GMX_CPUID_VENDOR_AMD:
1018 cpuid_check_amd_x86(cpuid);
1021 case GMX_CPUID_VENDOR_ARM:
1022 cpuid_check_arm(cpuid);
1026 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_STRLEN);
1027 #if defined(__linux__) || defined(__linux)
1028 /* General Linux. Try to get CPU type from /proc/cpuinfo */
1029 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
1032 while ( (found_brand == 0) && (fgets(buffer, sizeof(buffer), fp) != NULL))
1034 chomp_substring_before_colon(buffer, buffer2, sizeof(buffer2));
1035 /* Intel uses "model name", Fujitsu and IBM "cpu". */
1036 if (!strcmp(buffer2, "model name") || !strcmp(buffer2, "cpu"))
1038 chomp_substring_after_colon(buffer, cpuid->brand, GMX_CPUID_STRLEN);
1047 cpuid->stepping = 0;
1049 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1051 cpuid->feature[i] = 0;
1053 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
1062 gmx_cpuid_done (gmx_cpuid_t cpuid)
1069 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
1075 enum gmx_cpuid_feature feature;
1081 "Family: %2d Model: %2d Stepping: %2d\n"
1083 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1084 gmx_cpuid_brand(cpuid),
1085 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1090 "Family: %2d Model: %2d Stepping: %2d\n"
1092 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1093 gmx_cpuid_brand(cpuid),
1094 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1102 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
1104 if (gmx_cpuid_feature(cpuid, feature) == 1)
1107 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1109 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1118 _snprintf(str, n, "\n");
1120 snprintf(str, n, "\n");
1130 gmx_cpuid_simd_suggest (gmx_cpuid_t cpuid)
1132 enum gmx_cpuid_simd tmpsimd;
1134 tmpsimd = GMX_CPUID_SIMD_NONE;
1136 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1138 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX2))
1140 tmpsimd = GMX_CPUID_SIMD_X86_AVX2_256;
1142 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1144 tmpsimd = GMX_CPUID_SIMD_X86_AVX_256;
1146 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1148 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1150 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1152 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1155 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1157 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1159 tmpsimd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
1161 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1163 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1165 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1167 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1170 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_FUJITSU)
1172 if (strstr(gmx_cpuid_brand(cpuid), "SPARC64"))
1174 tmpsimd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
1177 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_IBM)
1179 if (strstr(gmx_cpuid_brand(cpuid), "A2"))
1181 tmpsimd = GMX_CPUID_SIMD_IBM_QPX;
1184 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_ARM)
1186 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_ARM_NEON_ASIMD))
1188 tmpsimd = GMX_CPUID_SIMD_ARM_NEON_ASIMD;
1190 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_ARM_NEON))
1192 tmpsimd = GMX_CPUID_SIMD_ARM_NEON;
1201 gmx_cpuid_simd_check(gmx_cpuid_t cpuid,
1203 int print_to_stderr)
1207 enum gmx_cpuid_simd simd;
1209 simd = gmx_cpuid_simd_suggest(cpuid);
1211 rc = (simd != compiled_simd);
1213 gmx_cpuid_formatstring(cpuid, str, 1023);
1219 "\nDetecting CPU SIMD instructions.\nPresent hardware specification:\n"
1221 "SIMD instructions most likely to fit this hardware: %s\n"
1222 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1224 gmx_cpuid_simd_string[simd],
1225 gmx_cpuid_simd_string[compiled_simd]);
1232 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1233 "SIMD instructions most likely to fit this hardware: %s\n"
1234 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1235 gmx_cpuid_simd_string[simd],
1236 gmx_cpuid_simd_string[compiled_simd]);
1238 if (print_to_stderr)
1240 fprintf(stderr, "Compiled SIMD instructions: %s (Gromacs could use %s on this machine, which is better)\n",
1241 gmx_cpuid_simd_string[compiled_simd],
1242 gmx_cpuid_simd_string[simd]);
1249 #ifdef GMX_CPUID_STANDALONE
1250 /* Stand-alone program to enable queries of CPU features from Cmake.
1251 * Note that you need to check inline ASM capabilities before compiling and set
1252 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1255 main(int argc, char **argv)
1258 enum gmx_cpuid_simd simd;
1264 "Usage:\n\n%s [flags]\n\n"
1265 "Available flags:\n"
1266 "-vendor Print CPU vendor.\n"
1267 "-brand Print CPU brand string.\n"
1268 "-family Print CPU family version.\n"
1269 "-model Print CPU model version.\n"
1270 "-stepping Print CPU stepping version.\n"
1271 "-features Print CPU feature flags.\n"
1272 "-simd Print suggested GROMACS SIMD instructions.\n",
1277 gmx_cpuid_init(&cpuid);
1279 if (!strncmp(argv[1], "-vendor", 3))
1281 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1283 else if (!strncmp(argv[1], "-brand", 3))
1285 printf("%s\n", cpuid->brand);
1287 else if (!strncmp(argv[1], "-family", 3))
1289 printf("%d\n", cpuid->family);
1291 else if (!strncmp(argv[1], "-model", 3))
1293 printf("%d\n", cpuid->model);
1295 else if (!strncmp(argv[1], "-stepping", 3))
1297 printf("%d\n", cpuid->stepping);
1299 else if (!strncmp(argv[1], "-features", 3))
1302 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1304 if (cpuid->feature[i] == 1)
1310 printf("%s", gmx_cpuid_feature_string[i]);
1315 else if (!strncmp(argv[1], "-simd", 3))
1317 simd = gmx_cpuid_simd_suggest(cpuid);
1318 fprintf(stdout, "%s\n", gmx_cpuid_simd_string[simd]);
1321 gmx_cpuid_done(cpuid);