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38 #include "gromacs/legacyheaders/gmx_cpuid.h"
49 #ifdef GMX_NATIVE_WINDOWS
50 /* MSVC definition for __cpuid() */
54 /* sysinfo functions */
61 /* sysconf() definition */
66 /* For convenience, and to enable configure-time invocation, we keep all architectures
67 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
70 /* OK, it is x86, but can we execute cpuid? */
71 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)))
72 # define GMX_CPUID_X86
76 /* Global constant character strings corresponding to our enumerated types */
78 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
85 "IBM", /* Used on Power and BlueGene/Q */
90 gmx_cpuid_vendor_string_alternative[GMX_CPUID_NVENDORS] =
97 "ibm", /* Used on Power and BlueGene/Q */
102 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
147 gmx_cpuid_simd_string[GMX_CPUID_NSIMD] =
165 /* Max length of brand string */
166 #define GMX_CPUID_STRLEN 256
169 /* Contents of the abstract datatype */
172 enum gmx_cpuid_vendor vendor;
173 char brand[GMX_CPUID_STRLEN];
177 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
178 char feature[GMX_CPUID_NFEATURES];
180 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
181 * operating systems and sometimes even settings. For most other architectures you can likely just check
182 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
184 int have_cpu_topology;
185 int nproc; /* total number of logical processors from OS */
187 int ncores_per_package;
188 int nhwthreads_per_core;
190 int * core_id; /* Local core id in each package */
191 int * hwthread_id; /* Local hwthread id in each core */
192 int * locality_order; /* Processor indices sorted in locality order */
196 /* Simple routines to access the data structure. The initialization routine is
197 * further down since that needs to call other static routines in this file.
199 enum gmx_cpuid_vendor
200 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
202 return cpuid->vendor;
207 gmx_cpuid_brand (gmx_cpuid_t cpuid)
213 gmx_cpuid_family (gmx_cpuid_t cpuid)
215 return cpuid->family;
219 gmx_cpuid_model (gmx_cpuid_t cpuid)
225 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
227 return cpuid->stepping;
231 gmx_cpuid_feature (gmx_cpuid_t cpuid,
232 enum gmx_cpuid_feature feature)
234 return (cpuid->feature[feature] != 0);
240 /* What type of SIMD was compiled in, if any? */
241 #ifdef GMX_SIMD_X86_AVX2_256
242 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX2_256;
243 #elif defined GMX_SIMD_X86_AVX_256
244 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_256;
245 #elif defined GMX_SIMD_X86_AVX_128_FMA
246 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
247 #elif defined GMX_SIMD_X86_SSE4_1
248 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE4_1;
249 #elif defined GMX_SIMD_X86_SSE2
250 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE2;
251 #elif defined GMX_SIMD_ARM_NEON
252 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_ARM_NEON;
253 #elif defined GMX_SIMD_ARM_NEON_ASIMD
254 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_ARM_NEON_ASIMD;
255 #elif defined GMX_SIMD_SPARC64_HPC_ACE
256 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
257 #elif defined GMX_SIMD_IBM_QPX
258 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_IBM_QPX;
259 #elif defined GMX_SIMD_IBM_VMX
260 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_IBM_VMX;
261 #elif defined GMX_SIMD_IBM_VSX
262 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_IBM_VSX;
263 #elif defined GMX_SIMD_REFERENCE
264 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_REFERENCE;
266 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_NONE;
272 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
273 * contents of register output is returned. See Intel/AMD docs for details.
275 * This version supports extended information where we can also have an input
276 * value in the ecx register. This is ignored for most levels, but some of them
277 * (e.g. level 0xB on Intel) use it.
280 execute_x86cpuid(unsigned int level,
289 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
290 * if the compiler handles GNU-style inline assembly.
293 #if (defined _MSC_VER)
296 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
297 /* MSVC 9.0 SP1 or later */
298 __cpuidex(CPUInfo, level, ecxval);
301 __cpuid(CPUInfo, level);
302 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
303 rc = (ecxval > 0) ? -1 : 0;
310 #elif (defined GMX_X86_GCC_INLINE_ASM)
311 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
312 * but there might be more options added in the future.
318 #if defined(__i386__) && defined(__PIC__)
319 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
320 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
322 "xchgl %%ebx, %1 \n\t"
323 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
325 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
326 __asm__ __volatile__ ("cpuid \n\t"
327 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
332 * Apparently this is an x86 platform where we don't know how to call cpuid.
334 * This is REALLY bad, since we will lose all Gromacs SIMD support.
347 /* Identify CPU features common to Intel & AMD - mainly brand string,
348 * version and some features. Vendor has already been detected outside this.
351 cpuid_check_common_x86(gmx_cpuid_t cpuid)
353 int fn, max_stdfn, max_extfn;
354 unsigned int eax, ebx, ecx, edx;
355 char str[GMX_CPUID_STRLEN];
358 /* Find largest standard/extended function input value */
359 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
361 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
365 if (max_extfn >= 0x80000005)
367 /* Get CPU brand string */
368 for (fn = 0x80000002; fn < 0x80000005; fn++)
370 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
372 memcpy(p+4, &ebx, 4);
373 memcpy(p+8, &ecx, 4);
374 memcpy(p+12, &edx, 4);
379 /* Remove empty initial space */
381 while (isspace(*(p)))
385 strncpy(cpuid->brand, p, GMX_CPUID_STRLEN);
389 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_STRLEN);
392 /* Find basic CPU properties */
395 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
397 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
398 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
399 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
400 cpuid->stepping = (eax & 0x0000000F);
402 /* Feature flags common to AMD and intel */
403 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
404 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
405 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
406 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
407 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
408 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
409 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
410 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
411 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
412 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
413 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
414 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
416 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
417 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
418 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
419 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
420 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
421 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
422 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
423 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
424 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
430 cpuid->stepping = -1;
433 if (max_extfn >= 0x80000001)
435 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
436 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
437 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
438 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
441 if (max_extfn >= 0x80000007)
443 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
444 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
449 /* This routine returns the number of unique different elements found in the array,
450 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
451 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
452 * number of unique elements.
455 cpuid_renumber_elements(int *data, int n)
458 int i, j, nunique, found;
460 unique = malloc(sizeof(int)*n);
463 for (i = 0; i < n; i++)
465 for (j = 0, found = 0; j < nunique && !found; j++)
467 found = (data[i] == unique[j]);
471 /* Insert in sorted order! */
472 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
474 unique[j] = unique[j-1];
480 for (i = 0; i < n; i++)
482 for (j = 0; j < nunique; j++)
484 if (data[i] == unique[j])
494 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
496 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
497 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
498 * we know is that the part for each thread/core/package is unique, and how many bits are
499 * reserved for that part.
500 * This routine does internal renumbering so we get continuous indices, and also
501 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
502 * Returns: 0 on success, non-zero on failure.
505 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
508 int hwthread_mask, core_mask_after_shift;
510 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
511 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
512 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
513 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
515 hwthread_mask = (1 << hwthread_bits) - 1;
516 core_mask_after_shift = (1 << core_bits) - 1;
518 for (i = 0; i < cpuid->nproc; i++)
520 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
521 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
522 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
525 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
526 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
527 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
529 /* now check for consistency */
530 if ( (cpuid->npackages * cpuid->ncores_per_package *
531 cpuid->nhwthreads_per_core) != cpuid->nproc)
533 /* the packages/cores-per-package/hwthreads-per-core counts are
538 /* Create a locality order array, i.e. first all resources in package0, which in turn
539 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
542 for (i = 0; i < cpuid->nproc; i++)
544 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
545 cpuid->locality_order[idx] = i;
551 /* Detection of AMD-specific CPU features */
553 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
555 int max_stdfn, max_extfn, ret;
556 unsigned int eax, ebx, ecx, edx;
557 int hwthread_bits, core_bits;
560 cpuid_check_common_x86(cpuid);
562 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
565 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
568 if (max_extfn >= 0x80000001)
570 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
572 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
573 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
574 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
575 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
578 /* Query APIC information on AMD */
579 if (max_extfn >= 0x80000008)
581 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
584 cpu_set_t cpuset, save_cpuset;
585 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
586 apic_id = malloc(sizeof(int)*cpuid->nproc);
587 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
588 /* Get APIC id from each core */
590 for (i = 0; i < cpuid->nproc; i++)
593 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
594 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
595 apic_id[i] = ebx >> 24;
598 /* Reset affinity to the value it had when calling this routine */
599 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
600 #define CPUID_HAVE_APIC
601 #elif defined GMX_NATIVE_WINDOWS
605 unsigned int save_affinity, affinity;
606 GetSystemInfo( &sysinfo );
607 cpuid->nproc = sysinfo.dwNumberOfProcessors;
608 apic_id = malloc(sizeof(int)*cpuid->nproc);
609 /* Get previous affinity mask */
610 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
611 for (i = 0; i < cpuid->nproc; i++)
613 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
615 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
616 apic_id[i] = ebx >> 24;
618 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
619 #define CPUID_HAVE_APIC
621 #ifdef CPUID_HAVE_APIC
622 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
624 /* Get number of core bits in apic ID - try modern extended method first */
625 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
626 core_bits = (ecx >> 12) & 0xf;
629 /* Legacy method for old single/dual core AMD CPUs */
631 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
636 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
638 cpuid->have_cpu_topology = (ret == 0);
644 /* Detection of Intel-specific CPU features */
646 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
648 unsigned int max_stdfn, max_extfn, ret;
649 unsigned int eax, ebx, ecx, edx;
650 unsigned int max_logical_cores, max_physical_cores;
651 int hwthread_bits, core_bits;
654 cpuid_check_common_x86(cpuid);
656 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
659 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
664 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
665 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
666 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
667 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
668 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
673 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
674 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
677 /* Check whether Hyper-Threading is enabled, not only supported */
678 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
680 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
681 max_logical_cores = (ebx >> 16) & 0x0FF;
682 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
683 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
685 /* Clear HTT flag if we only have 1 logical core per physical */
686 if (max_logical_cores/max_physical_cores < 2)
688 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
692 if (max_stdfn >= 0xB)
694 /* Query x2 APIC information from cores */
695 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
698 cpu_set_t cpuset, save_cpuset;
699 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
700 apic_id = malloc(sizeof(int)*cpuid->nproc);
701 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
702 /* Get x2APIC ID from each hardware thread */
704 for (i = 0; i < cpuid->nproc; i++)
707 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
708 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
712 /* Reset affinity to the value it had when calling this routine */
713 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
714 #define CPUID_HAVE_APIC
715 #elif defined GMX_NATIVE_WINDOWS
719 unsigned int save_affinity, affinity;
720 GetSystemInfo( &sysinfo );
721 cpuid->nproc = sysinfo.dwNumberOfProcessors;
722 apic_id = malloc(sizeof(int)*cpuid->nproc);
723 /* Get previous affinity mask */
724 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
725 for (i = 0; i < cpuid->nproc; i++)
727 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
729 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
732 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
733 #define CPUID_HAVE_APIC
735 #ifdef CPUID_HAVE_APIC
736 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
737 hwthread_bits = eax & 0x1F;
738 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
739 core_bits = (eax & 0x1F) - hwthread_bits;
740 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
742 cpuid->have_cpu_topology = (ret == 0);
747 #endif /* GMX_CPUID_X86 */
752 chomp_substring_before_colon(const char *in, char *s, int maxlength)
755 strncpy(s, in, maxlength);
760 while (isspace(*(--p)) && (p >= s))
772 chomp_substring_after_colon(const char *in, char *s, int maxlength)
775 if ( (p = strchr(in, ':')) != NULL)
782 strncpy(s, p, maxlength);
784 while (isspace(*(--p)) && (p >= s))
796 cpuid_check_arm(gmx_cpuid_t cpuid)
798 #if defined(__linux__) || defined(__linux)
800 char buffer[GMX_CPUID_STRLEN], buffer2[GMX_CPUID_STRLEN], buffer3[GMX_CPUID_STRLEN];
802 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
804 while ( (fgets(buffer, sizeof(buffer), fp) != NULL))
806 chomp_substring_before_colon(buffer, buffer2, GMX_CPUID_STRLEN);
807 chomp_substring_after_colon(buffer, buffer3, GMX_CPUID_STRLEN);
809 if (!strcmp(buffer2, "Processor"))
811 strncpy(cpuid->brand, buffer3, GMX_CPUID_STRLEN);
813 else if (!strcmp(buffer2, "CPU architecture"))
815 cpuid->family = strtol(buffer3, NULL, 10);
816 if (!strcmp(buffer3, "AArch64"))
821 else if (!strcmp(buffer2, "CPU part"))
823 cpuid->model = strtol(buffer3, NULL, 16);
825 else if (!strcmp(buffer2, "CPU revision"))
827 cpuid->stepping = strtol(buffer3, NULL, 10);
829 else if (!strcmp(buffer2, "Features") && strstr(buffer3, "neon"))
831 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON] = 1;
833 else if (!strcmp(buffer2, "Features") && strstr(buffer3, "asimd"))
835 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON_ASIMD] = 1;
842 /* Strange 64-bit non-linux platform. However, since NEON ASIMD is present on all
843 * implementations of AArch64 this far, we assume it is present for now.
845 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON_ASIMD] = 1;
847 /* Strange 32-bit non-linux platform. We cannot assume that neon is present. */
848 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON] = 0;
856 cpuid_check_ibm(gmx_cpuid_t cpuid)
858 #if defined(__linux__) || defined(__linux)
860 char buffer[GMX_CPUID_STRLEN], before_colon[GMX_CPUID_STRLEN], after_colon[GMX_CPUID_STRLEN];
862 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
864 while ( (fgets(buffer, sizeof(buffer), fp) != NULL))
866 chomp_substring_before_colon(buffer, before_colon, GMX_CPUID_STRLEN);
867 chomp_substring_after_colon(buffer, after_colon, GMX_CPUID_STRLEN);
869 if (!strcmp(before_colon, "cpu") || !strcmp(before_colon, "Processor"))
871 strncpy(cpuid->brand, after_colon, GMX_CPUID_STRLEN);
873 if (!strcmp(before_colon, "model name") ||
874 !strcmp(before_colon, "model") ||
875 !strcmp(before_colon, "Processor") ||
876 !strcmp(before_colon, "cpu"))
878 if (strstr(after_colon, "altivec"))
880 cpuid->feature[GMX_CPUID_FEATURE_IBM_VMX] = 1;
882 if (!strstr(after_colon, "POWER6") && !strstr(after_colon, "Power6") &&
883 !strstr(after_colon, "power6"))
885 cpuid->feature[GMX_CPUID_FEATURE_IBM_VSX] = 1;
893 if (strstr(cpuid->brand, "A2"))
896 cpuid->feature[GMX_CPUID_FEATURE_IBM_QPX] = 1;
899 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_STRLEN);
900 cpuid->feature[GMX_CPUID_FEATURE_IBM_QPX] = 0;
901 cpuid->feature[GMX_CPUID_FEATURE_IBM_VMX] = 0;
902 cpuid->feature[GMX_CPUID_FEATURE_IBM_VSX] = 0;
908 /* Try to find the vendor of the current CPU, so we know what specific
909 * detection routine to call.
911 static enum gmx_cpuid_vendor
912 cpuid_check_vendor(void)
914 enum gmx_cpuid_vendor i, vendor;
915 /* Register data used on x86 */
916 unsigned int eax, ebx, ecx, edx;
917 char vendorstring[13];
919 char buffer[GMX_CPUID_STRLEN];
920 char before_colon[GMX_CPUID_STRLEN];
921 char after_colon[GMX_CPUID_STRLEN];
923 /* Set default first */
924 vendor = GMX_CPUID_VENDOR_UNKNOWN;
927 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
929 memcpy(vendorstring, &ebx, 4);
930 memcpy(vendorstring+4, &edx, 4);
931 memcpy(vendorstring+8, &ecx, 4);
933 vendorstring[12] = '\0';
935 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
937 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
942 #elif defined(__linux__) || defined(__linux)
943 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
944 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
946 while ( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer, sizeof(buffer), fp) != NULL))
948 chomp_substring_before_colon(buffer, before_colon, sizeof(before_colon));
949 /* Intel/AMD use "vendor_id", IBM "vendor", "model", or "cpu". Fujitsu "manufacture".
950 * On ARM there does not seem to be a vendor, but ARM or AArch64 is listed in the Processor string.
951 * Add others if you have them!
953 if (!strcmp(before_colon, "vendor_id")
954 || !strcmp(before_colon, "vendor")
955 || !strcmp(before_colon, "manufacture")
956 || !strcmp(before_colon, "model")
957 || !strcmp(before_colon, "Processor")
958 || !strcmp(before_colon, "cpu"))
960 chomp_substring_after_colon(buffer, after_colon, sizeof(after_colon));
961 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
963 /* Be liberal and accept if we find the vendor
964 * string (or alternative string) anywhere. Using
965 * strcasestr() would be non-portable. */
966 if (strstr(after_colon, gmx_cpuid_vendor_string[i])
967 || strstr(after_colon, gmx_cpuid_vendor_string_alternative[i]))
972 /* If we did not find vendor yet, check if it is IBM:
973 * On some Power/PowerPC systems it only says power, not IBM.
975 if (vendor == GMX_CPUID_VENDOR_UNKNOWN &&
976 ((strstr(after_colon, "POWER") || strstr(after_colon, "Power") ||
977 strstr(after_colon, "power"))))
979 vendor = GMX_CPUID_VENDOR_IBM;
985 #elif defined(__arm__) || defined (__arm) || defined(__aarch64__)
986 /* If we are using ARM on something that is not linux we have to trust the compiler,
987 * and we cannot get the extra info that might be present in /proc/cpuinfo.
989 vendor = GMX_CPUID_VENDOR_ARM;
997 gmx_cpuid_topology(gmx_cpuid_t cpuid,
1000 int * ncores_per_package,
1001 int * nhwthreads_per_core,
1002 const int ** package_id,
1003 const int ** core_id,
1004 const int ** hwthread_id,
1005 const int ** locality_order)
1009 if (cpuid->have_cpu_topology)
1011 *nprocessors = cpuid->nproc;
1012 *npackages = cpuid->npackages;
1013 *ncores_per_package = cpuid->ncores_per_package;
1014 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
1015 *package_id = cpuid->package_id;
1016 *core_id = cpuid->core_id;
1017 *hwthread_id = cpuid->hwthread_id;
1018 *locality_order = cpuid->locality_order;
1029 enum gmx_cpuid_x86_smt
1030 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
1032 enum gmx_cpuid_x86_smt rc;
1034 if (cpuid->have_cpu_topology)
1036 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
1038 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
1040 rc = GMX_CPUID_X86_SMT_DISABLED;
1044 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
1051 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
1056 char buffer[GMX_CPUID_STRLEN], buffer2[GMX_CPUID_STRLEN];
1059 cpuid = malloc(sizeof(*cpuid));
1063 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1065 cpuid->feature[i] = 0;
1068 cpuid->have_cpu_topology = 0;
1070 cpuid->npackages = 0;
1071 cpuid->ncores_per_package = 0;
1072 cpuid->nhwthreads_per_core = 0;
1073 cpuid->package_id = NULL;
1074 cpuid->core_id = NULL;
1075 cpuid->hwthread_id = NULL;
1076 cpuid->locality_order = NULL;
1078 cpuid->vendor = cpuid_check_vendor();
1080 switch (cpuid->vendor)
1082 #ifdef GMX_CPUID_X86
1083 case GMX_CPUID_VENDOR_INTEL:
1084 cpuid_check_intel_x86(cpuid);
1086 case GMX_CPUID_VENDOR_AMD:
1087 cpuid_check_amd_x86(cpuid);
1090 case GMX_CPUID_VENDOR_ARM:
1091 cpuid_check_arm(cpuid);
1093 case GMX_CPUID_VENDOR_IBM:
1094 cpuid_check_ibm(cpuid);
1098 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_STRLEN);
1099 #if defined(__linux__) || defined(__linux)
1100 /* General Linux. Try to get CPU type from /proc/cpuinfo */
1101 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
1104 while ( (found_brand == 0) && (fgets(buffer, sizeof(buffer), fp) != NULL))
1106 chomp_substring_before_colon(buffer, buffer2, sizeof(buffer2));
1107 /* Intel uses "model name", Fujitsu and IBM "cpu". */
1108 if (!strcmp(buffer2, "model name") || !strcmp(buffer2, "cpu"))
1110 chomp_substring_after_colon(buffer, cpuid->brand, GMX_CPUID_STRLEN);
1119 cpuid->stepping = 0;
1121 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1123 cpuid->feature[i] = 0;
1125 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
1134 gmx_cpuid_done (gmx_cpuid_t cpuid)
1141 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
1147 enum gmx_cpuid_feature feature;
1153 "Family: %2d Model: %2d Stepping: %2d\n"
1155 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1156 gmx_cpuid_brand(cpuid),
1157 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1162 "Family: %2d Model: %2d Stepping: %2d\n"
1164 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1165 gmx_cpuid_brand(cpuid),
1166 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1174 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
1176 if (gmx_cpuid_feature(cpuid, feature) == 1)
1179 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1181 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1190 _snprintf(str, n, "\n");
1192 snprintf(str, n, "\n");
1202 gmx_cpuid_simd_suggest (gmx_cpuid_t cpuid)
1204 enum gmx_cpuid_simd tmpsimd;
1206 tmpsimd = GMX_CPUID_SIMD_NONE;
1208 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1210 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX2))
1212 tmpsimd = GMX_CPUID_SIMD_X86_AVX2_256;
1214 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1216 tmpsimd = GMX_CPUID_SIMD_X86_AVX_256;
1218 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1220 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1222 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1224 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1227 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1229 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1231 tmpsimd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
1233 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1235 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1237 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1239 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1242 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_FUJITSU)
1244 if (strstr(gmx_cpuid_brand(cpuid), "SPARC64"))
1246 tmpsimd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
1249 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_IBM)
1251 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_IBM_QPX))
1253 tmpsimd = GMX_CPUID_SIMD_IBM_QPX;
1255 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_IBM_VSX))
1257 /* VSX is better than VMX, so we check it first */
1258 tmpsimd = GMX_CPUID_SIMD_IBM_VSX;
1260 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_IBM_VMX))
1262 tmpsimd = GMX_CPUID_SIMD_IBM_VMX;
1265 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_ARM)
1267 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_ARM_NEON_ASIMD))
1269 tmpsimd = GMX_CPUID_SIMD_ARM_NEON_ASIMD;
1271 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_ARM_NEON))
1273 tmpsimd = GMX_CPUID_SIMD_ARM_NEON;
1282 gmx_cpuid_simd_check(gmx_cpuid_t cpuid,
1284 int print_to_stderr)
1288 enum gmx_cpuid_simd simd;
1290 simd = gmx_cpuid_simd_suggest(cpuid);
1292 rc = (simd != compiled_simd);
1294 gmx_cpuid_formatstring(cpuid, str, 1023);
1300 "\nDetecting CPU SIMD instructions.\nPresent hardware specification:\n"
1302 "SIMD instructions most likely to fit this hardware: %s\n"
1303 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1305 gmx_cpuid_simd_string[simd],
1306 gmx_cpuid_simd_string[compiled_simd]);
1313 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1314 "SIMD instructions most likely to fit this hardware: %s\n"
1315 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1316 gmx_cpuid_simd_string[simd],
1317 gmx_cpuid_simd_string[compiled_simd]);
1319 if (print_to_stderr)
1321 fprintf(stderr, "Compiled SIMD instructions: %s (Gromacs could use %s on this machine, which is better)\n",
1322 gmx_cpuid_simd_string[compiled_simd],
1323 gmx_cpuid_simd_string[simd]);
1330 #ifdef GMX_CPUID_STANDALONE
1331 /* Stand-alone program to enable queries of CPU features from Cmake.
1332 * Note that you need to check inline ASM capabilities before compiling and set
1333 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1336 main(int argc, char **argv)
1339 enum gmx_cpuid_simd simd;
1345 "Usage:\n\n%s [flags]\n\n"
1346 "Available flags:\n"
1347 "-vendor Print CPU vendor.\n"
1348 "-brand Print CPU brand string.\n"
1349 "-family Print CPU family version.\n"
1350 "-model Print CPU model version.\n"
1351 "-stepping Print CPU stepping version.\n"
1352 "-features Print CPU feature flags.\n"
1353 "-simd Print suggested GROMACS SIMD instructions.\n",
1358 gmx_cpuid_init(&cpuid);
1360 if (!strncmp(argv[1], "-vendor", 3))
1362 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1364 else if (!strncmp(argv[1], "-brand", 3))
1366 printf("%s\n", cpuid->brand);
1368 else if (!strncmp(argv[1], "-family", 3))
1370 printf("%d\n", cpuid->family);
1372 else if (!strncmp(argv[1], "-model", 3))
1374 printf("%d\n", cpuid->model);
1376 else if (!strncmp(argv[1], "-stepping", 3))
1378 printf("%d\n", cpuid->stepping);
1380 else if (!strncmp(argv[1], "-features", 3))
1383 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1385 if (cpuid->feature[i] == 1)
1391 printf("%s", gmx_cpuid_feature_string[i]);
1396 else if (!strncmp(argv[1], "-simd", 3))
1398 simd = gmx_cpuid_simd_suggest(cpuid);
1399 fprintf(stdout, "%s\n", gmx_cpuid_simd_string[simd]);
1402 gmx_cpuid_done(cpuid);