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38 * Utility constant and function declaration for the CUDA non-bonded kernels.
39 * This header should be included once at the top level, just before the
40 * kernels are included (has to be preceded by nbnxn_cuda_types.h).
42 * \author Szilárd Páll <pall.szilard@gmail.com>
43 * \ingroup module_mdlib
47 /* Note that floating-point constants in CUDA code should be suffixed
48 * with f (e.g. 0.5f), to stop the compiler producing intermediate
49 * code that is in double precision.
52 #include "gromacs/gpu_utils/cuda_arch_utils.cuh"
53 #include "gromacs/gpu_utils/cuda_kernel_utils.cuh"
54 #include "gromacs/gpu_utils/vectype_ops.cuh"
56 #include "nbnxn_cuda_types.h"
58 #ifndef NBNXN_CUDA_KERNEL_UTILS_CUH
59 #define NBNXN_CUDA_KERNEL_UTILS_CUH
61 /* Use texture objects if supported by the target hardware (and in host pass). */
62 #if GMX_PTX_ARCH >= 300 || GMX_PTX_ARCH == 0
63 /* Note: convenience macro, needs to be undef-ed at the end of the file. */
67 /*! \brief Log of the i and j cluster size.
68 * change this together with c_clSize !*/
69 static const int c_clSizeLog2 = 3;
70 /*! \brief Square of cluster size. */
71 static const int c_clSizeSq = c_clSize*c_clSize;
72 /*! \brief j-cluster size after split (4 in the current implementation). */
73 static const int c_splitClSize = c_clSize/c_nbnxnGpuClusterpairSplit;
74 /*! \brief Stride in the force accumualation buffer */
75 static const int c_fbufStride = c_clSizeSq;
76 /*! \brief i-cluster interaction mask for a super-cluster with all c_numClPerSupercl=8 bits set */
77 static const unsigned superClInteractionMask = ((1U << c_numClPerSupercl) - 1U);
79 static const float c_oneSixth = 0.16666667f;
80 static const float c_oneTwelveth = 0.08333333f;
83 /*! Convert LJ sigma,epsilon parameters to C6,C12. */
84 static __forceinline__ __device__
85 void convert_sigma_epsilon_to_c6_c12(const float sigma,
92 sigma2 = sigma * sigma;
93 sigma6 = sigma2 *sigma2 * sigma2;
94 *c6 = epsilon * sigma6;
98 /*! Apply force switch, force + energy version. */
99 static __forceinline__ __device__
100 void calculate_force_switch_F(const cu_nbparam_t nbparam,
109 /* force switch constants */
110 float disp_shift_V2 = nbparam.dispersion_shift.c2;
111 float disp_shift_V3 = nbparam.dispersion_shift.c3;
112 float repu_shift_V2 = nbparam.repulsion_shift.c2;
113 float repu_shift_V3 = nbparam.repulsion_shift.c3;
116 r_switch = r - nbparam.rvdw_switch;
117 r_switch = r_switch >= 0.0f ? r_switch : 0.0f;
120 -c6*(disp_shift_V2 + disp_shift_V3*r_switch)*r_switch*r_switch*inv_r +
121 c12*(-repu_shift_V2 + repu_shift_V3*r_switch)*r_switch*r_switch*inv_r;
124 /*! Apply force switch, force-only version. */
125 static __forceinline__ __device__
126 void calculate_force_switch_F_E(const cu_nbparam_t nbparam,
136 /* force switch constants */
137 float disp_shift_V2 = nbparam.dispersion_shift.c2;
138 float disp_shift_V3 = nbparam.dispersion_shift.c3;
139 float repu_shift_V2 = nbparam.repulsion_shift.c2;
140 float repu_shift_V3 = nbparam.repulsion_shift.c3;
142 float disp_shift_F2 = nbparam.dispersion_shift.c2/3;
143 float disp_shift_F3 = nbparam.dispersion_shift.c3/4;
144 float repu_shift_F2 = nbparam.repulsion_shift.c2/3;
145 float repu_shift_F3 = nbparam.repulsion_shift.c3/4;
148 r_switch = r - nbparam.rvdw_switch;
149 r_switch = r_switch >= 0.0f ? r_switch : 0.0f;
152 -c6*(disp_shift_V2 + disp_shift_V3*r_switch)*r_switch*r_switch*inv_r +
153 c12*(-repu_shift_V2 + repu_shift_V3*r_switch)*r_switch*r_switch*inv_r;
155 c6*(disp_shift_F2 + disp_shift_F3*r_switch)*r_switch*r_switch*r_switch -
156 c12*(repu_shift_F2 + repu_shift_F3*r_switch)*r_switch*r_switch*r_switch;
159 /*! Apply potential switch, force-only version. */
160 static __forceinline__ __device__
161 void calculate_potential_switch_F(const cu_nbparam_t nbparam,
170 /* potential switch constants */
171 float switch_V3 = nbparam.vdw_switch.c3;
172 float switch_V4 = nbparam.vdw_switch.c4;
173 float switch_V5 = nbparam.vdw_switch.c5;
174 float switch_F2 = 3*nbparam.vdw_switch.c3;
175 float switch_F3 = 4*nbparam.vdw_switch.c4;
176 float switch_F4 = 5*nbparam.vdw_switch.c5;
179 r_switch = r - nbparam.rvdw_switch;
181 /* Unlike in the F+E kernel, conditional is faster here */
184 sw = 1.0f + (switch_V3 + (switch_V4 + switch_V5*r_switch)*r_switch)*r_switch*r_switch*r_switch;
185 dsw = (switch_F2 + (switch_F3 + switch_F4*r_switch)*r_switch)*r_switch*r_switch;
187 *F_invr = (*F_invr)*sw - inv_r*(*E_lj)*dsw;
191 /*! Apply potential switch, force + energy version. */
192 static __forceinline__ __device__
193 void calculate_potential_switch_F_E(const cu_nbparam_t nbparam,
202 /* potential switch constants */
203 float switch_V3 = nbparam.vdw_switch.c3;
204 float switch_V4 = nbparam.vdw_switch.c4;
205 float switch_V5 = nbparam.vdw_switch.c5;
206 float switch_F2 = 3*nbparam.vdw_switch.c3;
207 float switch_F3 = 4*nbparam.vdw_switch.c4;
208 float switch_F4 = 5*nbparam.vdw_switch.c5;
211 r_switch = r - nbparam.rvdw_switch;
212 r_switch = r_switch >= 0.0f ? r_switch : 0.0f;
214 /* Unlike in the F-only kernel, masking is faster here */
215 sw = 1.0f + (switch_V3 + (switch_V4 + switch_V5*r_switch)*r_switch)*r_switch*r_switch*r_switch;
216 dsw = (switch_F2 + (switch_F3 + switch_F4*r_switch)*r_switch)*r_switch*r_switch;
218 *F_invr = (*F_invr)*sw - inv_r*(*E_lj)*dsw;
223 /*! \brief Fetch C6 grid contribution coefficients and return the product of these.
225 * Depending on what is supported, it fetches parameters either
226 * using direct load, texture objects, or texrefs.
228 static __forceinline__ __device__
229 float calculate_lj_ewald_c6grid(const cu_nbparam_t nbparam,
233 #if DISABLE_CUDA_TEXTURES
234 return LDG(&nbparam.nbfp_comb[2*typei]) * LDG(&nbparam.nbfp_comb[2*typej]);
237 return tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2*typei) * tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2*typej);
239 return tex1Dfetch(nbfp_comb_texref, 2*typei) * tex1Dfetch(nbfp_comb_texref, 2*typej);
240 #endif /* USE_TEXOBJ */
241 #endif /* DISABLE_CUDA_TEXTURES */
245 /*! Calculate LJ-PME grid force contribution with
246 * geometric combination rule.
248 static __forceinline__ __device__
249 void calculate_lj_ewald_comb_geom_F(const cu_nbparam_t nbparam,
258 float c6grid, inv_r6_nm, cr2, expmcr2, poly;
260 c6grid = calculate_lj_ewald_c6grid(nbparam, typei, typej);
262 /* Recalculate inv_r6 without exclusion mask */
263 inv_r6_nm = inv_r2*inv_r2*inv_r2;
265 expmcr2 = expf(-cr2);
266 poly = 1.0f + cr2 + 0.5f*cr2*cr2;
268 /* Subtract the grid force from the total LJ force */
269 *F_invr += c6grid*(inv_r6_nm - expmcr2*(inv_r6_nm*poly + lje_coeff6_6))*inv_r2;
273 /*! Calculate LJ-PME grid force + energy contribution with
274 * geometric combination rule.
276 static __forceinline__ __device__
277 void calculate_lj_ewald_comb_geom_F_E(const cu_nbparam_t nbparam,
288 float c6grid, inv_r6_nm, cr2, expmcr2, poly, sh_mask;
290 c6grid = calculate_lj_ewald_c6grid(nbparam, typei, typej);
292 /* Recalculate inv_r6 without exclusion mask */
293 inv_r6_nm = inv_r2*inv_r2*inv_r2;
295 expmcr2 = expf(-cr2);
296 poly = 1.0f + cr2 + 0.5f*cr2*cr2;
298 /* Subtract the grid force from the total LJ force */
299 *F_invr += c6grid*(inv_r6_nm - expmcr2*(inv_r6_nm*poly + lje_coeff6_6))*inv_r2;
301 /* Shift should be applied only to real LJ pairs */
302 sh_mask = nbparam.sh_lj_ewald*int_bit;
303 *E_lj += c_oneSixth*c6grid*(inv_r6_nm*(1.0f - expmcr2*poly) + sh_mask);
306 /*! Fetch per-type LJ parameters.
308 * Depending on what is supported, it fetches parameters either
309 * using direct load, texture objects, or texrefs.
311 static __forceinline__ __device__
312 float2 fetch_nbfp_comb_c6_c12(const cu_nbparam_t nbparam,
316 #if DISABLE_CUDA_TEXTURES
317 /* Force an 8-byte fetch to save a memory instruction. */
318 float2 *nbfp_comb = (float2 *)nbparam.nbfp_comb;
319 c6c12 = LDG(&nbfp_comb[type]);
321 /* NOTE: as we always do 8-byte aligned loads, we could
322 fetch float2 here too just as above. */
324 c6c12.x = tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2*type);
325 c6c12.y = tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2*type + 1);
327 c6c12.x = tex1Dfetch(nbfp_comb_texref, 2*type);
328 c6c12.y = tex1Dfetch(nbfp_comb_texref, 2*type + 1);
329 #endif /* USE_TEXOBJ */
330 #endif /* DISABLE_CUDA_TEXTURES */
336 /*! Calculate LJ-PME grid force + energy contribution (if E_lj != NULL) with
337 * Lorentz-Berthelot combination rule.
338 * We use a single F+E kernel with conditional because the performance impact
339 * of this is pretty small and LB on the CPU is anyway very slow.
341 static __forceinline__ __device__
342 void calculate_lj_ewald_comb_LB_F_E(const cu_nbparam_t nbparam,
353 float c6grid, inv_r6_nm, cr2, expmcr2, poly;
354 float sigma, sigma2, epsilon;
356 /* sigma and epsilon are scaled to give 6*C6 */
357 float2 c6c12_i = fetch_nbfp_comb_c6_c12(nbparam, typei);
358 float2 c6c12_j = fetch_nbfp_comb_c6_c12(nbparam, typej);
360 sigma = c6c12_i.x + c6c12_j.x;
361 epsilon = c6c12_i.y * c6c12_j.y;
363 sigma2 = sigma*sigma;
364 c6grid = epsilon*sigma2*sigma2*sigma2;
366 /* Recalculate inv_r6 without exclusion mask */
367 inv_r6_nm = inv_r2*inv_r2*inv_r2;
369 expmcr2 = expf(-cr2);
370 poly = 1.0f + cr2 + 0.5f*cr2*cr2;
372 /* Subtract the grid force from the total LJ force */
373 *F_invr += c6grid*(inv_r6_nm - expmcr2*(inv_r6_nm*poly + lje_coeff6_6))*inv_r2;
379 /* Shift should be applied only to real LJ pairs */
380 sh_mask = nbparam.sh_lj_ewald*int_bit;
381 *E_lj += c_oneSixth*c6grid*(inv_r6_nm*(1.0f - expmcr2*poly) + sh_mask);
386 /*! Fetch two consecutive values from the Ewald correction F*r table.
388 * Depending on what is supported, it fetches parameters either
389 * using direct load, texture objects, or texrefs.
391 static __forceinline__ __device__
392 float2 fetch_coulomb_force_r(const cu_nbparam_t nbparam,
397 #if DISABLE_CUDA_TEXTURES
398 /* Can't do 8-byte fetch because some of the addresses will be misaligned. */
399 d.x = LDG(&nbparam.coulomb_tab[index]);
400 d.y = LDG(&nbparam.coulomb_tab[index + 1]);
403 d.x = tex1Dfetch<float>(nbparam.coulomb_tab_texobj, index);
404 d.y = tex1Dfetch<float>(nbparam.coulomb_tab_texobj, index + 1);
406 d.x = tex1Dfetch(coulomb_tab_texref, index);
407 d.y = tex1Dfetch(coulomb_tab_texref, index + 1);
409 #endif // DISABLE_CUDA_TEXTURES
414 /*! Linear interpolation using exactly two FMA operations.
416 * Implements numeric equivalent of: (1-t)*d0 + t*d1
417 * Note that CUDA does not have fnms, otherwise we'd use
418 * fma(t, d1, fnms(t, d0, d0)
419 * but input modifiers are designed for this and are fast.
421 template <typename T>
422 __forceinline__ __host__ __device__
423 T lerp(T d0, T d1, T t)
425 return fma(t, d1, fma(-t, d0, d0));
428 /*! Interpolate Ewald coulomb force correction using the F*r table.
430 static __forceinline__ __device__
431 float interpolate_coulomb_force_r(const cu_nbparam_t nbparam,
434 float normalized = nbparam.coulomb_tab_scale * r;
435 int index = (int) normalized;
436 float fraction = normalized - index;
438 float2 d01 = fetch_coulomb_force_r(nbparam, index);
440 return lerp(d01.x, d01.y, fraction);
443 /*! Fetch C6 and C12 from the parameter table.
445 * Depending on what is supported, it fetches parameters either
446 * using direct load, texture objects, or texrefs.
448 static __forceinline__ __device__
449 void fetch_nbfp_c6_c12(float &c6,
451 const cu_nbparam_t nbparam,
454 #if DISABLE_CUDA_TEXTURES
455 /* Force an 8-byte fetch to save a memory instruction. */
456 float2 *nbfp = (float2 *)nbparam.nbfp;
458 c6c12 = LDG(&nbfp[baseIndex]);
462 /* NOTE: as we always do 8-byte aligned loads, we could
463 fetch float2 here too just as above. */
465 c6 = tex1Dfetch<float>(nbparam.nbfp_texobj, 2*baseIndex);
466 c12 = tex1Dfetch<float>(nbparam.nbfp_texobj, 2*baseIndex + 1);
468 c6 = tex1Dfetch(nbfp_texref, 2*baseIndex);
469 c12 = tex1Dfetch(nbfp_texref, 2*baseIndex + 1);
471 #endif // DISABLE_CUDA_TEXTURES
475 /*! Calculate analytical Ewald correction term. */
476 static __forceinline__ __device__
477 float pmecorrF(float z2)
479 const float FN6 = -1.7357322914161492954e-8f;
480 const float FN5 = 1.4703624142580877519e-6f;
481 const float FN4 = -0.000053401640219807709149f;
482 const float FN3 = 0.0010054721316683106153f;
483 const float FN2 = -0.019278317264888380590f;
484 const float FN1 = 0.069670166153766424023f;
485 const float FN0 = -0.75225204789749321333f;
487 const float FD4 = 0.0011193462567257629232f;
488 const float FD3 = 0.014866955030185295499f;
489 const float FD2 = 0.11583842382862377919f;
490 const float FD1 = 0.50736591960530292870f;
491 const float FD0 = 1.0f;
494 float polyFN0, polyFN1, polyFD0, polyFD1;
498 polyFD0 = FD4*z4 + FD2;
499 polyFD1 = FD3*z4 + FD1;
500 polyFD0 = polyFD0*z4 + FD0;
501 polyFD0 = polyFD1*z2 + polyFD0;
503 polyFD0 = 1.0f/polyFD0;
505 polyFN0 = FN6*z4 + FN4;
506 polyFN1 = FN5*z4 + FN3;
507 polyFN0 = polyFN0*z4 + FN2;
508 polyFN1 = polyFN1*z4 + FN1;
509 polyFN0 = polyFN0*z4 + FN0;
510 polyFN0 = polyFN1*z2 + polyFN0;
512 return polyFN0*polyFD0;
515 /*! Final j-force reduction; this generic implementation works with
516 * arbitrary array sizes.
518 static __forceinline__ __device__
519 void reduce_force_j_generic(float *f_buf, float3 *fout,
520 int tidxi, int tidxj, int aidx)
525 for (int j = tidxj * c_clSize; j < (tidxj + 1) * c_clSize; j++)
527 f += f_buf[c_fbufStride * tidxi + j];
530 atomicAdd((&fout[aidx].x)+tidxi, f);
534 /*! Final j-force reduction; this implementation only with power of two
535 * array sizes and with sm >= 3.0
537 #if GMX_PTX_ARCH >= 300 || GMX_PTX_ARCH == 0
538 static __forceinline__ __device__
539 void reduce_force_j_warp_shfl(float3 f, float3 *fout,
541 const unsigned int activemask)
543 f.x += gmx_shfl_down_sync(activemask, f.x, 1);
544 f.y += gmx_shfl_up_sync (activemask, f.y, 1);
545 f.z += gmx_shfl_down_sync(activemask, f.z, 1);
552 f.x += gmx_shfl_down_sync(activemask, f.x, 2);
553 f.z += gmx_shfl_up_sync (activemask, f.z, 2);
560 f.x += gmx_shfl_down_sync(activemask, f.x, 4);
564 atomicAdd((&fout[aidx].x) + tidxi, f.x);
569 /*! Final i-force reduction; this generic implementation works with
570 * arbitrary array sizes.
571 * TODO: add the tidxi < 3 trick
573 static __forceinline__ __device__
574 void reduce_force_i_generic(float *f_buf, float3 *fout,
575 float *fshift_buf, bool bCalcFshift,
576 int tidxi, int tidxj, int aidx)
581 for (int j = tidxi; j < c_clSizeSq; j += c_clSize)
583 f += f_buf[tidxj * c_fbufStride + j];
586 atomicAdd(&fout[aidx].x + tidxj, f);
595 /*! Final i-force reduction; this implementation works only with power of two
598 static __forceinline__ __device__
599 void reduce_force_i_pow2(volatile float *f_buf, float3 *fout,
600 float *fshift_buf, bool bCalcFshift,
601 int tidxi, int tidxj, int aidx)
606 assert(c_clSize == 1 << c_clSizeLog2);
608 /* Reduce the initial c_clSize values for each i atom to half
609 * every step by using c_clSize * i threads.
610 * Can't just use i as loop variable because than nvcc refuses to unroll.
614 for (j = c_clSizeLog2 - 1; j > 0; j--)
619 f_buf[ tidxj * c_clSize + tidxi] += f_buf[ (tidxj + i) * c_clSize + tidxi];
620 f_buf[ c_fbufStride + tidxj * c_clSize + tidxi] += f_buf[ c_fbufStride + (tidxj + i) * c_clSize + tidxi];
621 f_buf[2 * c_fbufStride + tidxj * c_clSize + tidxi] += f_buf[2 * c_fbufStride + (tidxj + i) * c_clSize + tidxi];
626 /* i == 1, last reduction step, writing to global mem */
629 /* tidxj*c_fbufStride selects x, y or z */
630 f = f_buf[tidxj * c_fbufStride + tidxi] +
631 f_buf[tidxj * c_fbufStride + i * c_clSize + tidxi];
633 atomicAdd(&(fout[aidx].x) + tidxj, f);
643 /*! Final i-force reduction wrapper; calls the generic or pow2 reduction depending
644 * on whether the size of the array to be reduced is power of two or not.
646 static __forceinline__ __device__
647 void reduce_force_i(float *f_buf, float3 *f,
648 float *fshift_buf, bool bCalcFshift,
649 int tidxi, int tidxj, int ai)
651 if ((c_clSize & (c_clSize - 1)))
653 reduce_force_i_generic(f_buf, f, fshift_buf, bCalcFshift, tidxi, tidxj, ai);
657 reduce_force_i_pow2(f_buf, f, fshift_buf, bCalcFshift, tidxi, tidxj, ai);
661 /*! Final i-force reduction; this implementation works only with power of two
662 * array sizes and with sm >= 3.0
664 #if GMX_PTX_ARCH >= 300 || GMX_PTX_ARCH == 0
665 static __forceinline__ __device__
666 void reduce_force_i_warp_shfl(float3 fin, float3 *fout,
667 float *fshift_buf, bool bCalcFshift,
669 const unsigned int activemask)
671 fin.x += gmx_shfl_down_sync(activemask, fin.x, c_clSize);
672 fin.y += gmx_shfl_up_sync (activemask, fin.y, c_clSize);
673 fin.z += gmx_shfl_down_sync(activemask, fin.z, c_clSize);
680 fin.x += gmx_shfl_down_sync(activemask, fin.x, 2*c_clSize);
681 fin.z += gmx_shfl_up_sync (activemask, fin.z, 2*c_clSize);
688 /* Threads 0,1,2 and 4,5,6 increment x,y,z for their warp */
691 atomicAdd(&fout[aidx].x + (tidxj & 3), fin.x);
695 *fshift_buf += fin.x;
701 /*! Energy reduction; this implementation works only with power of two
704 static __forceinline__ __device__
705 void reduce_energy_pow2(volatile float *buf,
706 float *e_lj, float *e_el,
714 /* Can't just use i as loop variable because than nvcc refuses to unroll. */
716 for (j = warp_size_log2 - 1; j > 0; j--)
720 buf[ tidx] += buf[ tidx + i];
721 buf[c_fbufStride + tidx] += buf[c_fbufStride + tidx + i];
726 // TODO do this on two threads - requires e_lj and e_el to be stored on adjascent
727 // memory locations to make sense
728 /* last reduction step, writing to global mem */
731 e1 = buf[ tidx] + buf[ tidx + i];
732 e2 = buf[c_fbufStride + tidx] + buf[c_fbufStride + tidx + i];
739 /*! Energy reduction; this implementation works only with power of two
740 * array sizes and with sm >= 3.0
742 #if GMX_PTX_ARCH >= 300 || GMX_PTX_ARCH == 0
743 static __forceinline__ __device__
744 void reduce_energy_warp_shfl(float E_lj, float E_el,
745 float *e_lj, float *e_el,
747 const unsigned int activemask)
753 for (i = 0; i < 5; i++)
755 E_lj += gmx_shfl_down_sync(activemask, E_lj, sh);
756 E_el += gmx_shfl_down_sync(activemask, E_el, sh);
760 /* The first thread in the warp writes the reduced energies */
761 if (tidx == 0 || tidx == warp_size)
763 atomicAdd(e_lj, E_lj);
764 atomicAdd(e_el, E_el);
767 #endif /* GMX_PTX_ARCH */
771 #endif /* NBNXN_CUDA_KERNEL_UTILS_CUH */