Merge branch 'release-5-0'

Trivial conflict resolved in runner.cpp.

Change-Id: I5bf8d6672246938f498fff609a7b0943505d2afb

diff --git a/src/gromacs/gmxlib/gmx_cpuid.c b/src/gromacs/gmxlib/gmx_cpuid.c
index f91e2b42c45f726b07b855f44b71f7b892d94fb2..44091a79e292e98818f25de455f0cfb5dd20f22c 100644 (file)
--- a/src/gromacs/gmxlib/gmx_cpuid.c
+++ b/src/gromacs/gmxlib/gmx_cpuid.c
@@ -241,6 +241,18 @@ gmx_cpuid_feature           (gmx_cpuid_t                cpuid,
 }
 
 
+int
+gmx_cpuid_is_intel_nehalem  (const gmx_cpuid_t          cpuid)
+{
+    return (cpuid->vendor == GMX_CPUID_VENDOR_INTEL &&
+            cpuid->family == 6 &&
+            (cpuid->model == 0x2E ||
+             cpuid->model == 0x1A ||
+             cpuid->model == 0x1E ||
+             cpuid->model == 0x2F ||
+             cpuid->model == 0x2C ||
+             cpuid->model == 0x25));
+}
 
 
 /* What type of SIMD was compiled in, if any? */

diff --git a/src/gromacs/gmxpreprocess/readir.c b/src/gromacs/gmxpreprocess/readir.c
index 4e69abd8b38dc91287c196c27101e7fbf7bbe468..2d86536b178e5ddbd4077a3c550f8c50bca99fb9 100644 (file)
--- a/src/gromacs/gmxpreprocess/readir.c
+++ b/src/gromacs/gmxpreprocess/readir.c
@@ -2194,6 +2194,9 @@ void get_ir(const char *mdparin, const char *mdparout,
     CTYPE ("Format is number of terms (int) and for all terms an amplitude (real)");
     CTYPE ("and a phase angle (real)");
     STYPE ("E-x",     is->efield_x,   NULL);
+    CTYPE ("Time dependent (pulsed) electric field. Format is omega, time for pulse");
+    CTYPE ("peak, and sigma (width) for pulse. Sigma = 0 removes pulse, leaving");
+    CTYPE ("the field to be a cosine function.");
     STYPE ("E-xt",    is->efield_xt,  NULL);
     STYPE ("E-y",     is->efield_y,   NULL);
     STYPE ("E-yt",    is->efield_yt,  NULL);

diff --git a/src/gromacs/legacyheaders/gmx_cpuid.h b/src/gromacs/legacyheaders/gmx_cpuid.h
index 5e296941c5f22070538c8e0057a06ef7c4eb4123..517bf2e7a296537e1d292b9fd7daa7b9e504ddeb 100644 (file)
--- a/src/gromacs/legacyheaders/gmx_cpuid.h
+++ b/src/gromacs/legacyheaders/gmx_cpuid.h
@@ -210,6 +210,13 @@ gmx_cpuid_feature           (gmx_cpuid_t                cpuid,
                              enum gmx_cpuid_feature     feature);
 
 
+/* Check whether the CPU is an Intel with Nehalem microarchitecture.
+ * Return 0 if not Intel Nehalem, 1 if Intel Nehalem.
+ */
+int
+gmx_cpuid_is_intel_nehalem  (const gmx_cpuid_t          cpuid);
+
+
 /* Return pointers to cpu topology information.
  *
  * Important: CPU topology requires more OS support than most other

diff --git a/src/programs/mdrun/runner.cpp b/src/programs/mdrun/runner.cpp
index 10c6cc47fa1712367db2e76beb33c0c930a9a5c2..2e122a897d016f9b7e1c57cb15bd98414944fb7f 100644 (file)
--- a/src/programs/mdrun/runner.cpp
+++ b/src/programs/mdrun/runner.cpp
@@ -309,20 +309,22 @@ static int get_tmpi_omp_thread_division(const gmx_hw_info_t *hwinfo,
          * two CPUs with HT, so we need a limit<16; thus we use 12.
          * A reasonable limit for Intel Sandy and Ivy bridge,
          * not knowing the topology, is 16 threads.
+         * Below we check for Intel and AVX, which for now includes
+         * Sandy/Ivy Bridge, Has/Broadwell. By checking for AVX instead of
+         * model numbers we ensure also future Intel CPUs are covered.
          */
         const int nthreads_omp_always_faster             =  4;
         const int nthreads_omp_always_faster_Nehalem     = 12;
-        const int nthreads_omp_always_faster_SandyBridge = 16;
-        gmx_bool  bIntel_Family6;
+        const int nthreads_omp_always_faster_Intel_AVX   = 16;
+        gmx_bool  bIntelAVX;
 
-        bIntel_Family6 =
+        bIntelAVX =
             (gmx_cpuid_vendor(hwinfo->cpuid_info) == GMX_CPUID_VENDOR_INTEL &&
-             gmx_cpuid_family(hwinfo->cpuid_info) == 6);
+             gmx_cpuid_feature(hwinfo->cpuid_info, GMX_CPUID_FEATURE_X86_AVX));
 
         if (nthreads_tot <= nthreads_omp_always_faster ||
-            (bIntel_Family6 &&
-             ((gmx_cpuid_model(hwinfo->cpuid_info) >= nthreads_omp_always_faster_Nehalem && nthreads_tot <= nthreads_omp_always_faster_Nehalem) ||
-              (gmx_cpuid_model(hwinfo->cpuid_info) >= nthreads_omp_always_faster_SandyBridge && nthreads_tot <= nthreads_omp_always_faster_SandyBridge))))
+            ((gmx_cpuid_is_intel_nehalem(hwinfo->cpuid_info) && nthreads_tot <= nthreads_omp_always_faster_Nehalem) ||
+             (bIntelAVX && nthreads_tot <= nthreads_omp_always_faster_Intel_AVX)))
         {
             /* Use pure OpenMP parallelization */
             nthreads_tmpi = 1;