{
return false;
}
- // detect Gold 5120 and below
+ // detect Gold 5xxx - can be corrected once Cooper Lake is added
else if (brand.find("Gold") == 17 && brand.find('5') == 22)
{
- return (brand.find("22") == 24);
+ return (brand.find("53") == 22 || // detect Cooper Lake
+ brand.find("22") == 24); // detect 5[12]22
}
}
return true;
setFeatureFromBit(features, CpuInfo::Feature::X86_Avx512BW, ebx, 30);
setFeatureFromBit(features, CpuInfo::Feature::X86_Avx512VL, ebx, 31);
+ executeX86CpuID(0x7, 0x1, &eax, &ebx, &ecx, &edx);
+ setFeatureFromBit(features, CpuInfo::Feature::X86_Avx512BF16, eax, 5);
+
if (features->count(CpuInfo::Feature::X86_Avx512F) != 0)
{
// Only checking if the CPU supports AVX-512. There is no CPUID bit for this.
{ Feature::X86_Avx512CD, "avx512cd" },
{ Feature::X86_Avx512BW, "avx512bw" },
{ Feature::X86_Avx512VL, "avx512vl" },
+ { Feature::X86_Avx512BF16, "avx512bf16" },
{ Feature::X86_Avx512secondFMA, "avx512secondFMA" },
{ Feature::X86_Clfsh, "clfsh" },
{ Feature::X86_Cmov, "cmov" },
X86_Avx512CD, //!< Memory conflict-detection for AVX-512
X86_Avx512BW, //!< AVX-512 byte and word instructions
X86_Avx512VL, //!< AVX-512 vector length extensions
+ X86_Avx512BF16, //!< AVX-512 BFloat16 instructions
X86_Avx512secondFMA, //!< AVX-512 second FMA unit
X86_Clfsh, //!< Supports CLFLUSH instruction
X86_Cmov, //!< Conditional move insn support