#define GMX_HAVE_SIMD_MACROS
/* In general the reference SIMD supports any SIMD width, including 1.
- * For the nbnxn 4xn kernels all widths (2, 4 and 8) are supported.
- * The nbnxn 2xnn kernels are currently not supported.
+ * See types/nb_verlet.h for details
*/
#define GMX_SIMD_REF_WIDTH 4
#ifdef GMX_SIMD_REFERENCE_PLAIN_C
+/* Set the stride for the lookup of the two LJ parameters from their
+ * (padded) array.
+ * Note that currently only arrays with stride 2 and 4 are available.
+ * Since the reference code does not require alignment, we can always use 2.
+ */
+static const int nbfp_stride = 2;
+
+/* Align a stack-based thread-local working array. */
+static gmx_inline int *
+prepare_table_load_buffer(const int *array)
+{
+ return NULL;
+}
+
#include "nbnxn_kernel_simd_utils_ref.h"
#else /* GMX_SIMD_REFERENCE_PLAIN_C */
/* Include x86 SSE2 compatible SIMD functions */
/* Set the stride for the lookup of the two LJ parameters from their
- (padded) array. Only strides of 2 and 4 are currently supported. */
-#if defined GMX_NBNXN_SIMD_2XNN
-static const int nbfp_stride = 4;
-#elif defined GMX_DOUBLE
+ * (padded) array. We use the minimum supported SIMD memory alignment.
+ */
+#if defined GMX_DOUBLE
static const int nbfp_stride = 2;
#else
static const int nbfp_stride = 4;