Merge "Merge branch release-2019 into master"
authorMark Abraham <mark.j.abraham@gmail.com>
Tue, 24 Sep 2019 16:03:08 +0000 (18:03 +0200)
committerMark Abraham <mark.j.abraham@gmail.com>
Tue, 24 Sep 2019 16:03:08 +0000 (18:03 +0200)
cmake/gmxDetectSimd.cmake
cmake/gmxManageMPI.cmake
docs/release-notes/2019/2019.4.rst
src/gromacs/gmxpreprocess/topshake.cpp
src/gromacs/listed_forces/bonded.cpp
src/gromacs/nbnxm/cuda/nbnxm_cuda_data_mgmt.cu
src/gromacs/nbnxm/nbnxm_gpu.h
src/gromacs/nbnxm/opencl/nbnxm_ocl.cpp
src/gromacs/nbnxm/opencl/nbnxm_ocl_data_mgmt.cpp
src/gromacs/simd/support.cpp

index 4231cb15eaaaa9b9289d227f58c6c9098f06fdb2..97d7f5b7ac239f6ebda6246999ec542dfd9f3187 100644 (file)
@@ -1,7 +1,7 @@
 #
 # This file is part of the GROMACS molecular simulation package.
 #
-# Copyright (c) 2012,2013,2014,2015,2016,2017,2018, by the GROMACS development team, led by
+# Copyright (c) 2012,2013,2014,2015,2016,2017,2018,2019, by the GROMACS development team, led by
 # Mark Abraham, David van der Spoel, Berk Hess, and Erik Lindahl,
 # and including many others, as listed in the AUTHORS file in the
 # top-level source directory and at http://www.gromacs.org.
@@ -95,8 +95,18 @@ function(gmx_suggest_simd _suggested_simd)
                 endif()
             elseif(CPU_DETECTION_FEATURES MATCHES " avx2 ")
                 if(CPU_DETECTION_FEATURES MATCHES " amd ")
-                    set(OUTPUT_SIMD "AVX2_128")
+                    gmx_run_cpu_detection(family)
+                    gmx_run_cpu_detection(model)
+                    set(ZEN1_MODELS 1 17 8 24)
+                    if("${CPU_DETECTION_FAMILY}" STREQUAL "23" AND "${CPU_DETECTION_MODEL}" IN_LIST ZEN1_MODELS)
+                        # Zen/Zen+, where 128-bit AVX2 will be faster
+                        set(OUTPUT_SIMD "AVX2_128")
+                    else()
+                        # Zen2 or later, where 256-bit AVX2 should be faster
+                        set(OUTPUT_SIMD "AVX2_256")
+                    endif()
                 else()
+                    # not AMD
                     set(OUTPUT_SIMD "AVX2_256")
                 endif()
             elseif(CPU_DETECTION_FEATURES MATCHES " avx ")
index 78600ba7e34d96f8f3243364c0eacfe2e5e0c72c..0a614a430cae1577554e43a1abf2ccbdccdb329e 100644 (file)
@@ -50,10 +50,10 @@ if(GMX_MPI)
   if(NOT MPI_FOUND)
       find_package(MPI)
       if(MPI_C_FOUND)
-        set(MPI_COMPILE_FLAGS ${MPI_C_COMPILE_FLAGS})
-        set(MPI_LINKER_FLAGS ${MPI_C_LINK_FLAGS})
-        include_directories(SYSTEM ${MPI_C_INCLUDE_PATH})
-        list(APPEND GMX_COMMON_LIBRARIES ${MPI_C_LIBRARIES})
+          set(MPI_COMPILE_FLAGS ${MPI_C_COMPILE_FLAGS})
+          set(MPI_LINKER_FLAGS ${MPI_C_LINK_FLAGS})
+          include_directories(SYSTEM ${MPI_C_INCLUDE_PATH})
+          list(APPEND GMX_COMMON_LIBRARIES ${MPI_C_LIBRARIES})
       endif()
       set(MPI_FOUND ${MPI_C_FOUND})
   else()
index 3d3f59af7f316d73185c903404cccf40f2214c6d..3ab895e69843d42bbd52698b0426f560917f9027 100644 (file)
@@ -16,6 +16,32 @@ in the :ref:`release-notes`.
 Fixes where mdrun could behave incorrectly
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
+Fix incorrect pressure when atoms in CMAP cross a box boundary
+""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""
+
+The virial calculation and thus the pressure would be incorrect
+when the second and third atom involved in a CHARMM CMAP correction
+term would reside in different periodic images. This can happen when
+a protein is positioned over a box boundary. Note that the energy
+and forces were correct, but sampling was affected when pressure
+coupling was applied when a protein crossed a box boundary.
+
+:issue:`2845`
+:issue:`2867`
+
+Fix incorrect LJ cut-off on GPU when rvdw < rcoulomb
+""""""""""""""""""""""""""""""""""""""""""""""""""""
+
+When rvdw was chosen by the user to be smaller than rcoulomb in the mdp file,
+the LJ cut-off would initially be set to the Coulomb cut-off for computing
+non-bonded interactions on the GPU. This only affected energy minimization,
+mdrun -rerun and the first 2*nstlist steps of a normal MD run, since the correct
+LJ cut-off is set when PME tuning (on by default) starts after 2*nstlist steps
+(unless PME tuning was disabled with -notunepme).
+
+:issue:`3056`
+
+
 Fix (unlikely) missing bonded forces with CUDA GPUs and domain decomposition
 """"""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""
 
@@ -37,6 +63,15 @@ Fix segmentation fault in grompp and mdrun with cosine COM pulling
 Fixes for ``gmx`` tools
 ^^^^^^^^^^^^^^^^^^^^^^^
 
+Fix grompp not adding angle constraints between constraints
+"""""""""""""""""""""""""""""""""""""""""""""""""""""""""""
+
+When using the mdp option constraints=all-angles, angles involving
+bonds supplied as constraints in the topology would be removed,
+but not replaced by angle constraints.
+
+:issue:`3067`
+
 Fix bug in gmx xpm2ps
 """""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""
 
index d640f6ca22176bfc4ef9f7239b86b0dc7d5ec6a8..37c25fabd309368d6b19b884d18c7a5597dbfb3c 100644 (file)
@@ -106,7 +106,7 @@ void make_shake(gmx::ArrayRef<InteractionsOfType> plist, t_atoms *atoms, int nsh
              */
             for (int ftype = 0; (ftype < F_NRE); ftype++)
             {
-                if (interaction_function[ftype].flags & IF_BTYPE)
+                if (interaction_function[ftype].flags & IF_CHEMBOND)
                 {
                     InteractionsOfType *bonds = &(plist[ftype]);
 
@@ -159,6 +159,12 @@ void make_shake(gmx::ArrayRef<InteractionsOfType> plist, t_atoms *atoms, int nsh
                                         real              param = std::sqrt( b_ij*b_ij + b_jk*b_jk -
                                                                              2.0*b_ij*b_jk*cos(DEG2RAD*ang->c0()));
                                         std::vector<real> forceParm = {param, param};
+                                        if (ftype == F_CONNBONDS ||
+                                            ftype_a == F_CONNBONDS)
+                                        {
+                                            gmx_fatal(FARGS, "Can not constrain all angles when they involved bonds of type %s",
+                                                      interaction_function[F_CONNBONDS].longname);
+                                        }
                                         /* apply law of cosines */
 #ifdef DEBUG
                                         printf("p: %d, q: %d, dist: %12.5e\n", atomNumbers[0],
index 902453320fe0ae8e50c8342202cc65077adc6021..fcb85f8854a3eb1c6d38770d41dd92ed90f8e24b 100644 (file)
@@ -3223,7 +3223,7 @@ cmap_dihs(int nbonds,
             rvec_inc(fshift[t21], f1_k);
             rvec_inc(fshift[t31], f1_l);
 
-            rvec_inc(fshift[t21], f2_i);
+            rvec_inc(fshift[t12], f2_i);
             rvec_inc(fshift[CENTRAL], f2_j);
             rvec_inc(fshift[t22], f2_k);
             rvec_inc(fshift[t32], f2_l);
index bdeefcbb660965d271ad34ed41f5c3e477e041dd..1df63f01db93d40e2a8a87bce1c542fb3c8b2d93 100644 (file)
@@ -155,8 +155,9 @@ static void init_atomdata_first(cu_atomdata_t *ad, int ntypes)
 
 /*! Selects the Ewald kernel type, analytical on SM 3.0 and later, tabulated on
     earlier GPUs, single or twin cut-off. */
-static int pick_ewald_kernel_type(bool                     bTwinCut)
+static int pick_ewald_kernel_type(const interaction_const_t &ic)
 {
+    bool bTwinCut = (ic.rcoulomb != ic.rvdw);
     bool bUseAnalyticalEwald, bForceAnalyticalEwald, bForceTabulatedEwald;
     int  kernel_type;
 
@@ -309,8 +310,7 @@ static void init_nbparam(cu_nbparam_t                   *nbp,
     }
     else if ((EEL_PME(ic->eeltype) || ic->eeltype == eelEWALD))
     {
-        /* Initially rcoulomb == rvdw, so it's surely not twin cut-off. */
-        nbp->eeltype = pick_ewald_kernel_type(false);
+        nbp->eeltype = pick_ewald_kernel_type(*ic);
     }
     else
     {
@@ -354,7 +354,7 @@ void gpu_pme_loadbal_update_param(const nonbonded_verlet_t    *nbv,
 
     set_cutoff_parameters(nbp, ic, nbv->pairlistSets().params());
 
-    nbp->eeltype        = pick_ewald_kernel_type(ic->rcoulomb != ic->rvdw);
+    nbp->eeltype        = pick_ewald_kernel_type(*ic);
 
     GMX_RELEASE_ASSERT(ic->coulombEwaldTables, "Need valid Coulomb Ewald correction tables");
     init_ewald_coulomb_force_table(*ic->coulombEwaldTables, nbp);
index fef2e749bc6d21d235dae9fced165031d4ee7d91..f30028180270048a24667127a8387a7b2deaff1b 100644 (file)
@@ -52,6 +52,7 @@
 #include "gpu_types.h"
 #include "locality.h"
 
+struct interaction_const_t;
 struct nbnxn_atomdata_t;
 struct gmx_wallcycle;
 enum class GpuTaskCompletion;
@@ -220,7 +221,7 @@ float gpu_wait_finish_task(gmx_nbnxn_gpu_t          gmx_unused *nb,
 
 /*! \brief Selects the Ewald kernel type, analytical or tabulated, single or twin cut-off. */
 GPU_FUNC_QUALIFIER
-int gpu_pick_ewald_kernel_type(bool gmx_unused bTwinCut) GPU_FUNC_TERM_WITH_RETURN(-1);
+int nbnxn_gpu_pick_ewald_kernel_type(const interaction_const_t gmx_unused &ic) GPU_FUNC_TERM_WITH_RETURN(-1);
 
 /*! \brief Initialization for X buffer operations on GPU.
  * Called on the NS step and performs (re-)allocations and memory copies. !*/
index 634801dc444b5930127888e7e9393676ded9e649..2ce49b2eb995736ec74de1d52799fd071af94d36 100644 (file)
@@ -829,8 +829,9 @@ void gpu_launch_cpyback(gmx_nbnxn_ocl_t                          *nb,
 
 
 /*! \brief Selects the Ewald kernel type, analytical or tabulated, single or twin cut-off. */
-int gpu_pick_ewald_kernel_type(const bool bTwinCut)
+int nbnxn_gpu_pick_ewald_kernel_type(const interaction_const_t &ic)
 {
+    bool bTwinCut = (ic.rcoulomb != ic.rvdw);
     bool bUseAnalyticalEwald, bForceAnalyticalEwald, bForceTabulatedEwald;
     int  kernel_type;
 
index a531330459199caeaa30288c2c4392a23a1ebdb9..a26ab41c990e8f6f643860f02baf1dceadac1dc8 100644 (file)
@@ -293,8 +293,7 @@ map_interaction_types_to_gpu_kernel_flavors(const interaction_const_t *ic,
     }
     else if ((EEL_PME(ic->eeltype) || ic->eeltype == eelEWALD))
     {
-        /* Initially rcoulomb == rvdw, so it's surely not twin cut-off. */
-        *gpu_eeltype = gpu_pick_ewald_kernel_type(false);
+        *gpu_eeltype = nbnxn_gpu_pick_ewald_kernel_type(*ic);
     }
     else
     {
@@ -429,7 +428,7 @@ void gpu_pme_loadbal_update_param(const nonbonded_verlet_t    *nbv,
 
     set_cutoff_parameters(nbp, ic, nbv->pairlistSets().params());
 
-    nbp->eeltype = gpu_pick_ewald_kernel_type(ic->rcoulomb != ic->rvdw);
+    nbp->eeltype = nbnxn_gpu_pick_ewald_kernel_type(*ic);
 
     GMX_RELEASE_ASSERT(ic->coulombEwaldTables, "Need valid Coulomb Ewald correction tables");
     init_ewald_coulomb_force_table(*ic->coulombEwaldTables, nbp, nb->dev_rundata);
index 8b334bb0b0fdc094696eef6726c028f53f983ec1..220b782cdb6cfa3c53563015371689313f068873 100644 (file)
@@ -90,6 +90,30 @@ simdString(SimdType s)
     return name.at(s);
 }
 
+namespace
+{
+
+
+//! Helper to detect correct AMD Zen architecture.
+bool
+cpuIsAmdZen1(const CpuInfo &cpuInfo)
+{
+    // Both Zen/Zen+/Zen2 have family==23
+    // Model numbers for Zen:
+    // 1)  Naples, Whitehaven, Summit ridge, and Snowy Owl
+    // 17) Raven ridge
+    // Model numbers for Zen+:
+    // 8)  Pinnacle Ridge
+    // 24) Picasso
+    return (cpuInfo.vendor() == gmx::CpuInfo::Vendor::Amd &&
+            cpuInfo.family() == 23 &&
+            (cpuInfo.model() == 1 || cpuInfo.model() == 17 ||
+             cpuInfo.model() == 8 || cpuInfo.model() == 24) );
+}
+
+}   // namespace
+
+
 SimdType
 simdSuggested(const CpuInfo &c)
 {
@@ -130,10 +154,12 @@ simdSuggested(const CpuInfo &c)
             case CpuInfo::Vendor::Hygon:
                 if (c.feature(CpuInfo::Feature::X86_Avx2))
                 {
-                    // AMD Ryzen supports 256-bit AVX2, but performs better with 128-bit
+                    // AMD Zen supports 256-bit AVX2, but Zen1 performs better with 128-bit
                     // since it can execute two independent such instructions per cycle,
                     // and wider SIMD has slightly lower efficiency in GROMACS.
-                    suggested = SimdType::X86_Avx2_128;
+                    // However... Zen2 supports full-width execution of 256-bit AVX2,
+                    // so we only want to apply this hack to Zen/Zen+.
+                    suggested = cpuIsAmdZen1(c) ? SimdType::X86_Avx2_128 : SimdType::X86_Avx2;
                 }
                 else if (c.feature(CpuInfo::Feature::X86_Avx))
                 {