Fix tMPI_Atomic_memory_barrier for MIC

MIC doesn't has sfence. It isn't required because the current generation
of MIC is in-order.

Change-Id: I6953bc3168a191a3038408e6ea35025a25509abe

diff --git a/include/thread_mpi/atomic/gcc_x86.h b/include/thread_mpi/atomic/gcc_x86.h
index 2fd496f6ebf8b306ecf8f65182d353f6be8ee4ef..403634cd5b4dd8e3a1f5c3690cbd5896e6e028d9 100644 (file)
--- a/include/thread_mpi/atomic/gcc_x86.h
+++ b/include/thread_mpi/atomic/gcc_x86.h
@@ -109,8 +109,12 @@ typedef struct tMPI_Spinlock
 #else
 /* older versions of gcc don't support atomic intrinsics */
 
-
+#ifndef __MIC__
 #define tMPI_Atomic_memory_barrier() __asm__ __volatile__("sfence;" : : : "memory")
+#else
+/* MIC is in-order and does not need nor support sfense */
+#define tMPI_Atomic_memory_barrier() __asm__ __volatile__("":::"memory")
+#endif
 
 #define TMPI_ATOMIC_HAVE_NATIVE_FETCH_ADD
 static inline int tMPI_Atomic_fetch_add(tMPI_Atomic_t *a, int i)