implemented nbnxn AVX-256 2x(N+N) kernels

implemented nbnxn AVX-256 2x(N+N) kernels

With AVX-256 nbnxn kernels are faster with 2x(4+4)=4x4 than 4x8.
To reduce the number of nbnxn kernels, there are no longer both
simd128 and simd256 kernels, but simd_4xn and for AVX-256 additionally
simd_2xnn kernels. The nbnxn search code is simplified significantly,
as it no longer has 128-bit and 256-bit simd simultaneously.
The SIMD pair-search and kernel configuration is now separated from
the SSE SIMD bounding box code configuration.

Additionally the label x86_simd in all nbnxn files is replaced by simd
only, in prepartion for non-x86 SIMD acceleration.

Change-Id: If03cf569cf918dcec675fbcb43e1ff3a30528f74