/*
* This file is part of the GROMACS molecular simulation package.
*
- * Copyright (c) 1991-2000, University of Groningen, The Netherlands.
- * Copyright (c) 2001-2012, The GROMACS Development Team
- * Copyright (c) 2012,2013, by the GROMACS development team, led by
- * David van der Spoel, Berk Hess, Erik Lindahl, and including many
- * others, as listed in the AUTHORS file in the top-level source
- * directory and at http://www.gromacs.org.
+ * Copyright (c) 2012,2013,2014, by the GROMACS development team, led by
+ * Mark Abraham, David van der Spoel, Berk Hess, and Erik Lindahl,
+ * and including many others, as listed in the AUTHORS file in the
+ * top-level source directory and at http://www.gromacs.org.
*
* GROMACS is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
#ifndef _nbnxn_kernel_simd_utils_x86_128s_h_
#define _nbnxn_kernel_simd_utils_x86_128s_h_
+#include "gromacs/legacyheaders/types/simple.h"
+
+#include "config.h"
+
/* This files contains all functions/macros for the SIMD kernels
* which have explicit dependencies on the j-cluster size and/or SIMD-width.
* The functionality which depends on the j-cluster size is:
* energy group pair energy storage
*/
+typedef gmx_simd_int32_t gmx_exclfilter;
+static const int filter_stride = GMX_SIMD_INT32_WIDTH/GMX_SIMD_REAL_WIDTH;
+
/* Collect element 0 and 1 of the 4 inputs to out0 and out1, respectively */
-static gmx_inline void
+static gmx_inline void gmx_simdcall
gmx_shuffle_4_ps_fil01_to_2_ps(__m128 in0, __m128 in1, __m128 in2, __m128 in3,
__m128 *out0, __m128 *out1)
{
}
/* Collect element 2 of the 4 inputs to out */
-static gmx_inline __m128
+static gmx_inline __m128 gmx_simdcall
gmx_shuffle_4_ps_fil2_to_1_ps(__m128 in0, __m128 in1, __m128 in2, __m128 in3)
{
__m128 _c01, _c23;
}
/* Sum the elements within each input register and store the sums in out */
-static gmx_inline __m128
+static gmx_inline __m128 gmx_simdcall
gmx_mm_transpose_sum4_pr(__m128 in0, __m128 in1,
__m128 in2, __m128 in3)
{
_MM_TRANSPOSE4_PS(in0, in1, in2, in3);
in0 = _mm_add_ps(in0, in1);
in2 = _mm_add_ps(in2, in3);
-
+
return _mm_add_ps(in0, in2);
}
{
__m128 clj_S[UNROLLJ];
int p;
-
+
for (p = 0; p < UNROLLJ; p++)
{
/* Here we load 4 aligned floats, but we need just 2 */
- clj_S[p] = gmx_load_pr(nbfp+type[aj+p]*NBFP_STRIDE);
+ clj_S[p] = gmx_simd_load_r(nbfp+type[aj+p]*nbfp_stride);
}
gmx_shuffle_4_ps_fil01_to_2_ps(clj_S[0], clj_S[1], clj_S[2], clj_S[3], c6_S, c12_S);
}
* This is only faster when we use FDV0 formatted tables, where we also need
* to multiple the index by 4, which can be done by a SIMD bit shift.
* With single precision AVX, 8 extracts are much slower than 1 store.
- * Because of this, the load_table_f macro always takes the ti parameter,
- * but it is only used with AVX.
- */
+ * Because of this, the load_table_f function always takes the ti
+ * parameter, which should contain a buffer that is aligned with
+ * prepare_table_load_buffer(), but it is only used with full-width
+ * AVX_256. */
-static gmx_inline void
-load_table_f(const real *tab_coul_FDV0, gmx_epi32 ti_S, int *ti,
+static gmx_inline void gmx_simdcall
+load_table_f(const real *tab_coul_FDV0, gmx_simd_int32_t ti_S, int gmx_unused *ti,
__m128 *ctab0_S, __m128 *ctab1_S)
{
int idx[4];
/* Table has 4 entries, left-shift index by 2 */
ti_S = _mm_slli_epi32(ti_S, 2);
/* Without SSE4.1 the extract macro needs an immediate: unroll */
- idx[0] = gmx_mm_extract_epi32(ti_S, 0);
+ idx[0] = gmx_simd_extract_i(ti_S, 0);
ctab_S[0] = _mm_load_ps(tab_coul_FDV0+idx[0]);
- idx[1] = gmx_mm_extract_epi32(ti_S, 1);
+ idx[1] = gmx_simd_extract_i(ti_S, 1);
ctab_S[1] = _mm_load_ps(tab_coul_FDV0+idx[1]);
- idx[2] = gmx_mm_extract_epi32(ti_S, 2);
+ idx[2] = gmx_simd_extract_i(ti_S, 2);
ctab_S[2] = _mm_load_ps(tab_coul_FDV0+idx[2]);
- idx[3] = gmx_mm_extract_epi32(ti_S, 3);
+ idx[3] = gmx_simd_extract_i(ti_S, 3);
ctab_S[3] = _mm_load_ps(tab_coul_FDV0+idx[3]);
/* Shuffle the force table entries to a convenient order */
gmx_shuffle_4_ps_fil01_to_2_ps(ctab_S[0], ctab_S[1], ctab_S[2], ctab_S[3], ctab0_S, ctab1_S);
}
-static gmx_inline void
-load_table_f_v(const real *tab_coul_FDV0, gmx_epi32 ti_S, int *ti,
+static gmx_inline void gmx_simdcall
+load_table_f_v(const real *tab_coul_FDV0, gmx_simd_int32_t ti_S, int gmx_unused *ti,
__m128 *ctab0_S, __m128 *ctab1_S, __m128 *ctabv_S)
{
int idx[4];
/* Table has 4 entries, left-shift index by 2 */
ti_S = _mm_slli_epi32(ti_S, 2);
/* Without SSE4.1 the extract macro needs an immediate: unroll */
- idx[0] = gmx_mm_extract_epi32(ti_S, 0);
+ idx[0] = gmx_simd_extract_i(ti_S, 0);
ctab_S[0] = _mm_load_ps(tab_coul_FDV0+idx[0]);
- idx[1] = gmx_mm_extract_epi32(ti_S, 1);
+ idx[1] = gmx_simd_extract_i(ti_S, 1);
ctab_S[1] = _mm_load_ps(tab_coul_FDV0+idx[1]);
- idx[2] = gmx_mm_extract_epi32(ti_S, 2);
+ idx[2] = gmx_simd_extract_i(ti_S, 2);
ctab_S[2] = _mm_load_ps(tab_coul_FDV0+idx[2]);
- idx[3] = gmx_mm_extract_epi32(ti_S, 3);
+ idx[3] = gmx_simd_extract_i(ti_S, 3);
ctab_S[3] = _mm_load_ps(tab_coul_FDV0+idx[3]);
/* Shuffle the force table entries to a convenient order */
*ctabv_S = gmx_shuffle_4_ps_fil2_to_1_ps(ctab_S[0], ctab_S[1], ctab_S[2], ctab_S[3]);
}
+static gmx_inline gmx_exclfilter gmx_simdcall
+gmx_load1_exclfilter(int e)
+{
+ return _mm_set1_epi32(e);
+}
+
+static gmx_inline gmx_exclfilter gmx_simdcall
+gmx_load_exclusion_filter(const unsigned *i)
+{
+ return gmx_simd_load_i(i);
+}
+
+static gmx_inline gmx_simd_bool_t gmx_simdcall
+gmx_checkbitmask_pb(gmx_exclfilter m0, gmx_exclfilter m1)
+{
+ return _mm_castsi128_ps(_mm_cmpeq_epi32(_mm_andnot_si128(m0, m1), _mm_setzero_si128()));
+}
+
#endif /* _nbnxn_kernel_simd_utils_x86_s128s_h_ */
biod.pnpi.spb.ru / alexxy / gromacs.git / blobdiff