#include "gromacs/legacyheaders/types/simple.h"
+#include "config.h"
+
/* This files contains all functions/macros for the SIMD kernels
* which have explicit dependencies on the j-cluster size and/or SIMD-width.
* The functionality which depends on the j-cluster size is:
static const int filter_stride = GMX_SIMD_INT32_WIDTH/GMX_SIMD_REAL_WIDTH;
/* Collect element 0 and 1 of the 4 inputs to out0 and out1, respectively */
-static gmx_inline void
+static gmx_inline void gmx_simdcall
gmx_shuffle_4_ps_fil01_to_2_ps(__m128 in0, __m128 in1, __m128 in2, __m128 in3,
__m128 *out0, __m128 *out1)
{
}
/* Collect element 2 of the 4 inputs to out */
-static gmx_inline __m128
+static gmx_inline __m128 gmx_simdcall
gmx_shuffle_4_ps_fil2_to_1_ps(__m128 in0, __m128 in1, __m128 in2, __m128 in3)
{
__m128 _c01, _c23;
}
/* Sum the elements within each input register and store the sums in out */
-static gmx_inline __m128
+static gmx_inline __m128 gmx_simdcall
gmx_mm_transpose_sum4_pr(__m128 in0, __m128 in1,
__m128 in2, __m128 in3)
{
* prepare_table_load_buffer(), but it is only used with full-width
* AVX_256. */
-static gmx_inline void
+static gmx_inline void gmx_simdcall
load_table_f(const real *tab_coul_FDV0, gmx_simd_int32_t ti_S, int gmx_unused *ti,
__m128 *ctab0_S, __m128 *ctab1_S)
{
/* Table has 4 entries, left-shift index by 2 */
ti_S = _mm_slli_epi32(ti_S, 2);
/* Without SSE4.1 the extract macro needs an immediate: unroll */
- idx[0] = gmx_mm_extract_epi32(ti_S, 0);
+ idx[0] = gmx_simd_extract_i(ti_S, 0);
ctab_S[0] = _mm_load_ps(tab_coul_FDV0+idx[0]);
- idx[1] = gmx_mm_extract_epi32(ti_S, 1);
+ idx[1] = gmx_simd_extract_i(ti_S, 1);
ctab_S[1] = _mm_load_ps(tab_coul_FDV0+idx[1]);
- idx[2] = gmx_mm_extract_epi32(ti_S, 2);
+ idx[2] = gmx_simd_extract_i(ti_S, 2);
ctab_S[2] = _mm_load_ps(tab_coul_FDV0+idx[2]);
- idx[3] = gmx_mm_extract_epi32(ti_S, 3);
+ idx[3] = gmx_simd_extract_i(ti_S, 3);
ctab_S[3] = _mm_load_ps(tab_coul_FDV0+idx[3]);
/* Shuffle the force table entries to a convenient order */
gmx_shuffle_4_ps_fil01_to_2_ps(ctab_S[0], ctab_S[1], ctab_S[2], ctab_S[3], ctab0_S, ctab1_S);
}
-static gmx_inline void
+static gmx_inline void gmx_simdcall
load_table_f_v(const real *tab_coul_FDV0, gmx_simd_int32_t ti_S, int gmx_unused *ti,
__m128 *ctab0_S, __m128 *ctab1_S, __m128 *ctabv_S)
{
/* Table has 4 entries, left-shift index by 2 */
ti_S = _mm_slli_epi32(ti_S, 2);
/* Without SSE4.1 the extract macro needs an immediate: unroll */
- idx[0] = gmx_mm_extract_epi32(ti_S, 0);
+ idx[0] = gmx_simd_extract_i(ti_S, 0);
ctab_S[0] = _mm_load_ps(tab_coul_FDV0+idx[0]);
- idx[1] = gmx_mm_extract_epi32(ti_S, 1);
+ idx[1] = gmx_simd_extract_i(ti_S, 1);
ctab_S[1] = _mm_load_ps(tab_coul_FDV0+idx[1]);
- idx[2] = gmx_mm_extract_epi32(ti_S, 2);
+ idx[2] = gmx_simd_extract_i(ti_S, 2);
ctab_S[2] = _mm_load_ps(tab_coul_FDV0+idx[2]);
- idx[3] = gmx_mm_extract_epi32(ti_S, 3);
+ idx[3] = gmx_simd_extract_i(ti_S, 3);
ctab_S[3] = _mm_load_ps(tab_coul_FDV0+idx[3]);
/* Shuffle the force table entries to a convenient order */
*ctabv_S = gmx_shuffle_4_ps_fil2_to_1_ps(ctab_S[0], ctab_S[1], ctab_S[2], ctab_S[3]);
}
-static gmx_inline gmx_exclfilter
+static gmx_inline gmx_exclfilter gmx_simdcall
gmx_load1_exclfilter(int e)
{
return _mm_set1_epi32(e);
}
-static gmx_inline gmx_exclfilter
+static gmx_inline gmx_exclfilter gmx_simdcall
gmx_load_exclusion_filter(const unsigned *i)
{
- return _mm_load_si128((__m128i *) i);
+ return gmx_simd_load_i(i);
}
-static gmx_inline gmx_simd_bool_t
+static gmx_inline gmx_simd_bool_t gmx_simdcall
gmx_checkbitmask_pb(gmx_exclfilter m0, gmx_exclfilter m1)
{
- return gmx_mm_castsi128_ps(_mm_cmpeq_epi32(_mm_andnot_si128(m0, m1), _mm_setzero_si128()));
+ return _mm_castsi128_ps(_mm_cmpeq_epi32(_mm_andnot_si128(m0, m1), _mm_setzero_si128()));
}
#endif /* _nbnxn_kernel_simd_utils_x86_s128s_h_ */