GMX_CPUID_VENDOR_AMD,
GMX_CPUID_VENDOR_FUJITSU,
GMX_CPUID_VENDOR_IBM,
+ GMX_CPUID_VENDOR_ARM,
GMX_CPUID_NVENDORS
};
GMX_CPUID_FEATURE_X86_TDT, /* TSC deadline timer */
GMX_CPUID_FEATURE_X86_X2APIC, /* Extended xAPIC Support */
GMX_CPUID_FEATURE_X86_XOP, /* AMD extended instructions, only AMD for now */
+ GMX_CPUID_FEATURE_ARM_NEON, /* 32-bit ARM NEON */
+ GMX_CPUID_FEATURE_ARM_NEON_ASIMD, /* 64-bit ARM AArch64 Advanced SIMD */
+ GMX_CPUID_FEATURE_IBM_QPX, /* IBM QPX SIMD (BlueGene/Q and later) */
+ GMX_CPUID_FEATURE_IBM_VMX, /* IBM VMX SIMD (Altivec on Power6 and later) */
+ GMX_CPUID_FEATURE_IBM_VSX, /* IBM VSX SIMD (Power7 and later) */
GMX_CPUID_NFEATURES
};
GMX_CPUID_SIMD_X86_AVX2_256,
GMX_CPUID_SIMD_SPARC64_HPC_ACE,
GMX_CPUID_SIMD_IBM_QPX,
+ GMX_CPUID_SIMD_IBM_VMX,
+ GMX_CPUID_SIMD_IBM_VSX,
+ GMX_CPUID_SIMD_ARM_NEON,
+ GMX_CPUID_SIMD_ARM_NEON_ASIMD,
GMX_CPUID_NSIMD
};