/* Currently supported SIMD instruction sets, intrinsics or other similar combinations
* in Gromacs. There is not always a 1-to-1 correspondence with feature flags; on some AMD
- * hardware we prefer to use 128bit AVX instructions (although 256-bit ones could be executed),
- * and we still haven't written the AVX2 kernels.
+ * hardware we prefer to use 128bit AVX instructions (although 256-bit ones could be executed).
+ * These are listed in increasing order for sets supported by one CPU.
+ * The order is only used for printing "minimum" and "maximum" suggested
+ * SIMD instruction sets for nodes in a cluster, so pairs like
+ * GMX_CPUID_SIMD_X86_AVX_128_FMA vs GMX_CPUID_SIMD_X86_AVX_256 which strictly
+ * speaking can't be ordered are not really an issue.
*/
enum gmx_cpuid_simd
{
gmx_cpuid_t;
+/* Return the SIMD instruction set GROMACS was compiled with. */
+enum gmx_cpuid_simd
+gmx_compiled_simd ();
+
+
/* Fill the data structure by using CPU detection instructions.
* Return 0 on success, 1 if something bad happened.
*/
* would suggest for the current hardware. Always print stats to the log file
* if it is non-NULL, and if we don't have a match, print a warning in log
* (if non-NULL) and if print_to_stderr!=0 also to stderr.
+ * The suggested SIMD instruction set simd_suggest is obtained with
+ * gmx_cpuid_simd_suggest(), but with MPI this might be different for
+ * different nodes, so it shoul be passed here after parallel reduction.
*/
int
-gmx_cpuid_simd_check (gmx_cpuid_t cpuid,
+gmx_cpuid_simd_check (enum gmx_cpuid_simd simd_suggest,
FILE * log,
int print_to_stderr);