// Check whether Hyper-threading is really possible to enable in the hardware,
// not just technically supported by this generation of processors
- if ((features->count(CpuInfo::Feature::X86_Htt) != 0u) && maxStdLevel >= 0x4)
+ if ((features->count(CpuInfo::Feature::X86_Htt) != 0U) && maxStdLevel >= 0x4)
{
executeX86CpuID(0x1, 0, &eax, &ebx, &ecx, &edx);
unsigned int maxLogicalCores = (ebx >> 16) & 0x0ff;
executeX86CpuID(0x1, 0, &eax, &ebx, &ecx, &edx);
int family = ((eax & 0x0ff00000) >> 20) + ((eax & 0x00000f00) >> 8);
executeX86CpuID(0x80000001, 0, &eax, &ebx, &ecx, &edx);
- bool haveExtendedTopology = (ecx & (1 << 22)) != 0u;
+ bool haveExtendedTopology = (ecx & (1 << 22)) != 0U;
// NOTE: Here we assume 1 thread per core, unless we have family >= 17h
layout.hwThreadBits = 0;
if (maxStdLevel >= 0x1)
{
executeX86CpuID(0x1, 0, &eax, &ebx, &ecx, &edx);
- haveX2Apic = ((ecx & (1 << 21)) != 0u) && maxStdLevel >= 0xb;
- haveApic = ((edx & (1 << 9)) != 0u) && maxExtLevel >= 0x80000008;
+ haveX2Apic = ((ecx & (1 << 21)) != 0U) && maxStdLevel >= 0xb;
+ haveApic = ((edx & (1 << 9)) != 0U) && maxExtLevel >= 0x80000008;
}
else
{
// testNames map above, and if it's a match return the vendor.
for (auto &l : { "vendor_id", "vendor", "manufacture", "model", "processor", "cpu" })
{
- if (cpuInfo.count(l) != 0u)
+ if (cpuInfo.count(l) != 0U)
{
// there was a line with this left-hand side in /proc/cpuinfo
const std::string &s1 = cpuInfo.at(l);
std::set<CpuInfo::Feature> * features)
{
// Get brand string from 'cpu' label if present, otherwise 'Processor'
- if (cpuInfo.count("cpu") != 0u)
+ if (cpuInfo.count("cpu") != 0U)
{
*brand = cpuInfo.at("cpu");
}
- else if (cpuInfo.count("Processor") != 0u)
+ else if (cpuInfo.count("Processor") != 0U)
{
*brand = cpuInfo.at("Processor");
}
for (auto &l : { "model name", "model", "Processor", "cpu" })
{
- if (cpuInfo.count(l) != 0u)
+ if (cpuInfo.count(l) != 0U)
{
std::string s1 = cpuInfo.at(l);
std::transform(s1.begin(), s1.end(), s1.begin(), ::tolower);
int * stepping,
std::set<CpuInfo::Feature> * features)
{
- if (cpuInfo.count("Processor") != 0u)
+ if (cpuInfo.count("Processor") != 0U)
{
*brand = cpuInfo.at("Processor");
}
- else if (cpuInfo.count("model name") != 0u)
+ else if (cpuInfo.count("model name") != 0U)
{
*brand = cpuInfo.at("model name");
}
- if (cpuInfo.count("CPU architecture") != 0u)
+ if (cpuInfo.count("CPU architecture") != 0U)
{
*family = std::strtol(cpuInfo.at("CPU architecture").c_str(), nullptr, 10);
// For some 64-bit CPUs it appears to say 'AArch64' instead
*family = 8; // fragile - no idea how a future ARMv9 will be represented in this case
}
}
- if (cpuInfo.count("CPU variant") != 0u)
+ if (cpuInfo.count("CPU variant") != 0U)
{
*model = std::strtol(cpuInfo.at("CPU variant").c_str(), nullptr, 16);
}
- if (cpuInfo.count("CPU revision") != 0u)
+ if (cpuInfo.count("CPU revision") != 0U)
{
*stepping = std::strtol(cpuInfo.at("CPU revision").c_str(), nullptr, 10);
}
- if (cpuInfo.count("Features") != 0u)
+ if (cpuInfo.count("Features") != 0U)
{
const std::string &s = cpuInfo.at("Features");
if (s.find("neon") != std::string::npos)