# does not support AVX, so we need to tell the linker to use the clang
# compilers assembler instead - and this has to happen before we detect AVX
# flags.
- if(APPLE AND ${CMAKE_C_COMPILER_ID} STREQUAL "GNU")
+ if(APPLE AND "${CMAKE_C_COMPILER_ID}" STREQUAL "GNU")
gmx_test_cflag(GNU_C_USE_CLANG_AS "-Wa,-q" SIMD_C_FLAGS)
endif()
- if(APPLE AND ${CMAKE_CXX_COMPILER_ID} STREQUAL "GNU")
+ if(APPLE AND "${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU")
gmx_test_cxxflag(GNU_CXX_USE_CLANG_AS "-Wa,-q" SIMD_CXX_FLAGS)
endif()
endmacro()
gmx_find_cflag_for_source(CFLAGS_SSE2 "C compiler SSE2 flag"
"#include<xmmintrin.h>
- int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return 0;}"
+ int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return _mm_movemask_ps(x);}"
SIMD_C_FLAGS
"-msse2" "/arch:SSE2" "-hgnu")
gmx_find_cxxflag_for_source(CXXFLAGS_SSE2 "C++ compiler SSE2 flag"
"#include<xmmintrin.h>
- int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return 0;}"
+ int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return _mm_movemask_ps(x);}"
SIMD_CXX_FLAGS
"-msse2" "/arch:SSE2" "-hgnu")
# Note: MSVC enables SSE4.1 with the SSE2 flag, so we include that in testing.
gmx_find_cflag_for_source(CFLAGS_SSE4_1 "C compiler SSE4.1 flag"
"#include<smmintrin.h>
- int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return 0;}"
+ int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return _mm_movemask_ps(x);}"
SIMD_C_FLAGS
"-msse4.1" "/arch:SSE4.1" "/arch:SSE2" "-hgnu")
gmx_find_cxxflag_for_source(CXXFLAGS_SSE4_1 "C++ compiler SSE4.1 flag"
"#include<smmintrin.h>
- int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return 0;}"
+ int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return _mm_movemask_ps(x);}"
SIMD_CXX_FLAGS
"-msse4.1" "/arch:SSE4.1" "/arch:SSE2" "-hgnu")
"#include<immintrin.h>
${INCLUDE_X86INTRIN_H}
${INCLUDE_INTRIN_H}
-int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return 0;}"
+int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return _mm_movemask_ps(x);}"
SIMD_C_FLAGS
"-mfma4" "-hgnu")
gmx_find_cxxflag_for_source(CXXFLAGS_AVX_128_FMA "C++ compiler AVX (128 bit) FMA4 flag"
"#include<immintrin.h>
${INCLUDE_X86INTRIN_H}
${INCLUDE_INTRIN_H}
-int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return 0;}"
+int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return _mm_movemask_ps(x);}"
SIMD_CXX_FLAGS
"-mfma4" "-hgnu")
"#include<immintrin.h>
${INCLUDE_X86INTRIN_H}
${INCLUDE_INTRIN_H}
-int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return 0;}"
+int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return _mm_movemask_ps(x);}"
SIMD_C_FLAGS
"-mxop")
gmx_find_cxxflag_for_source(CXXFLAGS_AVX_128_XOP "C++ compiler AVX (128 bit) XOP flag"
"#include<immintrin.h>
${INCLUDE_X86INTRIN_H}
${INCLUDE_INTRIN_H}
-int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return 0;}"
+int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return _mm_movemask_ps(x);}"
SIMD_CXX_FLAGS
"-mxop")
# We don't have the full compiler version string yet (BUILD_C_COMPILER),
# so we can't distinguish vanilla from Apple clang versions, but catering for a few rare AMD
# hackintoshes is not worth the effort.
- if (APPLE AND (${CMAKE_C_COMPILER_ID} STREQUAL "Clang" OR
- ${CMAKE_CXX_COMPILER_ID} STREQUAL "Clang"))
+ if (APPLE AND ("${CMAKE_C_COMPILER_ID}" STREQUAL "Clang" OR
+ "${CMAKE_CXX_COMPILER_ID}" STREQUAL "Clang"))
message(WARNING "Due to a known compiler bug, Clang up to version 3.2 (and Apple Clang up to version 4.1) produces incorrect code with AVX_128_FMA SIMD. As we cannot work around this bug on OS X, you will have to select a different compiler or SIMD instruction set.")
endif()
gmx_find_cflag_for_source(CFLAGS_AVX "C compiler AVX (256 bit) flag"
"#include<immintrin.h>
- int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return 0;}"
+ int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return _mm256_movemask_ps(x);}"
SIMD_C_FLAGS
"-mavx" "/arch:AVX" "-hgnu")
gmx_find_cxxflag_for_source(CXXFLAGS_AVX "C++ compiler AVX (256 bit) flag"
"#include<immintrin.h>
- int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return 0;}"
+ int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return _mm256_movemask_ps(x);}"
SIMD_CXX_FLAGS
"-mavx" "/arch:AVX" "-hgnu")
gmx_find_cflag_for_source(CFLAGS_AVX2 "C compiler AVX2 flag"
"#include<immintrin.h>
- int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_fmadd_ps(x,x,x);return 0;}"
+ int main(){__m256i x=_mm256_set1_epi32(5);x=_mm256_add_epi32(x,x);return _mm256_movemask_epi8(x);}"
SIMD_C_FLAGS
"-march=core-avx2" "-mavx2" "/arch:AVX" "-hgnu") # no AVX2-specific flag for MSVC yet
gmx_find_cxxflag_for_source(CXXFLAGS_AVX2 "C++ compiler AVX2 flag"
"#include<immintrin.h>
- int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_fmadd_ps(x,x,x);return 0;}"
+ int main(){__m256i x=_mm256_set1_epi32(5);x=_mm256_add_epi32(x,x);return _mm256_movemask_epi8(x);}"
SIMD_CXX_FLAGS
"-march=core-avx2" "-mavx2" "/arch:AVX" "-hgnu") # no AVX2-specific flag for MSVC yet
set(GMX_SIMD_X86_AVX2_256 1)
set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX2 SIMD instructions")
+elseif(${GMX_SIMD} STREQUAL "ARM_NEON")
+
+ gmx_find_cflag_for_source(CFLAGS_ARM_NEON "C compiler 32-bit ARM NEON flag"
+ "#include<arm_neon.h>
+ int main(){float32x4_t x=vdupq_n_f32(0.5);x=vmlaq_f32(x,x,x);return vgetq_lane_f32(x,0)>0;}"
+ SIMD_C_FLAGS
+ "-mfpu=neon" "")
+ gmx_find_cxxflag_for_source(CXXFLAGS_ARM_NEON "C++ compiler 32-bit ARM NEON flag"
+ "#include<arm_neon.h>
+ int main(){float32x4_t x=vdupq_n_f32(0.5);x=vmlaq_f32(x,x,x);return vgetq_lane_f32(x,0)>0;}"
+ SIMD_CXX_FLAGS
+ "-mfpu=neon" "-D__STDC_CONSTANT_MACROS" "")
+
+ if(NOT CFLAGS_ARM_NEON OR NOT CXXFLAGS_ARM_NEON)
+ message(FATAL_ERROR "Cannot find ARM 32-bit NEON compiler flag. Use a newer compiler, or disable NEON SIMD.")
+ endif()
+
+ set(GMX_SIMD_ARM_NEON 1)
+ set(SIMD_STATUS_MESSAGE "Enabling 32-bit ARM NEON SIMD instructions")
+
+elseif(${GMX_SIMD} STREQUAL "ARM_NEON_ASIMD")
+ # Gcc-4.8.1 appears to have a bug where the c++ compiler requires
+ # -D__STDC_CONSTANT_MACROS if we include arm_neon.h
+
+ gmx_find_cflag_for_source(CFLAGS_ARM_NEON_ASIMD "C compiler ARM NEON Advanced SIMD flag"
+ "#include<arm_neon.h>
+ int main(){float64x2_t x=vdupq_n_f64(0.5);x=vfmaq_f64(x,x,x);return vgetq_lane_f64(x,0)>0;}"
+ SIMD_C_FLAGS
+ "")
+ gmx_find_cxxflag_for_source(CXXFLAGS_ARM_NEON_ASIMD "C++ compiler ARM NEON Advanced SIMD flag"
+ "#include<arm_neon.h>
+ int main(){float64x2_t x=vdupq_n_f64(0.5);x=vfmaq_f64(x,x,x);return vgetq_lane_f64(x,0)>0;}"
+ SIMD_CXX_FLAGS
+ "-D__STDC_CONSTANT_MACROS" "")
+
+ if(NOT CFLAGS_ARM_NEON_ASIMD OR NOT CXXFLAGS_ARM_NEON_ASIMD)
+ message(FATAL_ERROR "Cannot find ARM (AArch64) NEON Advanced SIMD compiler flag. Use a newer compiler, or disable SIMD.")
+ endif()
+
+ if(CMAKE_C_COMPILER_ID MATCHES "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_LESS "4.9")
+ message(WARNING "At least gcc-4.8.1 has many bugs for ARM (AArch64) NEON Advanced SIMD compilation. You might need gcc version 4.9 or later.")
+ endif()
+
+ if(CMAKE_C_COMPILER_ID MATCHES "Clang" AND CMAKE_C_COMPILER_VERSION VERSION_LESS "3.4")
+ message(FATAL_ERROR "Clang version 3.4 or later is required for ARM (AArch64) NEON Advanced SIMD.")
+ endif()
+
+ set(GMX_SIMD_ARM_NEON_ASIMD 1)
+ set(SIMD_STATUS_MESSAGE "Enabling ARM (AArch64) NEON Advanced SIMD instructions")
+
elseif(${GMX_SIMD} STREQUAL "IBM_QPX")
try_compile(TEST_QPX ${CMAKE_BINARY_DIR}
message(FATAL_ERROR "Cannot compile the requested IBM QPX intrinsics. If you are compiling for BlueGene/Q with the XL compilers, use 'cmake .. -DCMAKE_TOOLCHAIN_FILE=Platform/BlueGeneQ-static-XL-C' to set up the tool chain.")
endif()
+elseif(${GMX_SIMD} STREQUAL "IBM_VMX")
+
+ gmx_find_cflag_for_source(CFLAGS_IBM_VMX "C compiler IBM VMX SIMD flag"
+ "#include<altivec.h>
+ int main(){vector float x,y=vec_ctf(vec_splat_s32(1),0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
+ SIMD_C_FLAGS
+ "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
+ gmx_find_cxxflag_for_source(CXXFLAGS_IBM_VMX "C++ compiler IBM VMX SIMD flag"
+ "#include<altivec.h>
+ int main(){vector float x,y=vec_ctf(vec_splat_s32(1),0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
+ SIMD_CXX_FLAGS
+ "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
+
+ if(NOT CFLAGS_IBM_VMX OR NOT CXXFLAGS_IBM_VMX)
+ message(FATAL_ERROR "Cannot find IBM VMX SIMD compiler flag. Use a newer compiler, or disable VMX SIMD.")
+ endif()
+
+ set(GMX_SIMD_IBM_VMX 1)
+ set(SIMD_STATUS_MESSAGE "Enabling IBM VMX SIMD instructions")
+
elseif(${GMX_SIMD} STREQUAL "SPARC64_HPC_ACE")
+ # Note that GMX_RELAXED_DOUBLE_PRECISION is enabled by default in the top-level CMakeLists.txt
+
set(GMX_SIMD_SPARC64_HPC_ACE 1)
set(SIMD_STATUS_MESSAGE "Enabling Sparc64 HPC-ACE SIMD instructions")
message(STATUS "${SIMD_STATUS_MESSAGE}")
endif()
+# By default, 32-bit windows cannot pass SIMD (SSE/AVX) arguments in registers,
+# and even on 64-bit (all platforms) it is only used for a handful of arguments.
+# The __vectorcall (MSVC, from MSVC2013) or __regcall (ICC) calling conventions
+# enable this, which is critical to enable 32-bit SIMD and improves performance
+# for 64-bit SIMD.
+# Check if the compiler supports one of these, and in that case set gmx_simdcall
+# to that string. If we do not have any such calling convention modifier, set it
+# to an empty string.
+if(NOT DEFINED GMX_SIMD_CALLING_CONVENTION)
+ foreach(callconv __vectorcall __regcall "")
+ set(callconv_compile_var "_callconv_${callconv}")
+ check_c_source_compiles("int ${callconv} f(int i) {return i;} int main(void) {return f(0);}" ${callconv_compile_var})
+ if(${callconv_compile_var})
+ set(GMX_SIMD_CALLING_CONVENTION "${callconv}" CACHE INTERNAL "Calling convention for SIMD routines" FORCE)
+ break()
+ endif()
+ endforeach()
+endif()
+
endmacro()
biod.pnpi.spb.ru / alexxy / gromacs.git / blobdiff