Merge branch release-2018

[alexxy/gromacs.git] / admin / builds / post-submit-matrix.txt

diff --git a/admin/builds/post-submit-matrix.txt b/admin/builds/post-submit-matrix.txt
index 00de439f9a3b508e1237eb77d781bf13f4d63ab7..89ec64b31b41f05325251d18cfca4a15295940ef 100644 (file)
--- a/admin/builds/post-submit-matrix.txt
+++ b/admin/builds/post-submit-matrix.txt
@@ -11,7 +11,7 @@
 
 # Test on ARM v7
 # Test ARM_NEON SIMD
-gcc-4.8 simd=ARM_NEON release-with-assert
+gcc-5 simd=ARM_NEON release-with-assert
 
 # Test on ARM v8
 # Test ARM_NEON_ASIMD SIMD
@@ -23,10 +23,9 @@ gcc-5 simd=ARM_NEON_ASIMD release-with-assert
 gcc-7 mpi no-openmp fftpack mdrun-only
 
 # Test MPMD PME with thread-MPI
-# Test newest icc at time of release
-# Test icc without SIMD in double precision in release mode
-# TODO enable simd=avx_256 in this config, and change the above description once #2335 is resolved
-icc-18 npme=1 nranks=2 no-openmp  double fftpack release simd=none
+# Test oldest supported icc
+# Test icc with AVX256 in double precision in release mode
+icc-17 simd=avx_256 npme=1 nranks=2 no-openmp  double fftpack release
 
 # Test CUDA build on a slave with no CUDA devices
 # Test without TNG support
@@ -34,7 +33,7 @@ gcc-4.9 gpu cuda-7.0 openmp no-tng release-with-assert
 
 # Test non-default GMX_PREFER_STATIC_LIBS behavior
 # TODO enable this
-# msvc-2015 double no-threadmpi no-prefer-static-libs release-with-assert
+# msvc-2017 double no-threadmpi no-prefer-static-libs release-with-assert
 
 # Test behaviour when dlopen is not present
 # TODO enable this
@@ -51,16 +50,25 @@ clang-5 openmp simd=avx_128_fma npme=1 nranks=2 mpi
 
 # Test SSE2 SIMD
 # Test CMAKE_BUILD_TYPE=Release
-gcc-4.8 gpu npme=1 nranks=2 cuda-7.5 simd=sse2 release
+# Test OpenCL
+# Test bundled clFFT (developed by AMD) on NVIDIA OpenCL
+gcc-6 gpu npme=1 nranks=2 opencl cuda-7.5 simd=sse2 release
 
 # Test non-default use of mdrun -gpu_id
 # Test GPU-sharing among 4 PP ranks
-gcc-5 gpu nranks=4 gpu_id=1 cuda-8.0 release-with-assert
+# Test no hwloc build, tests internal CPU topology detection (mainly for x86)
+gcc-5 gpu nranks=4 gpu_id=1 cuda-8.0 no-hwloc release-with-assert
 
-# Test oldest supported icc
 # Test icc on Windows
+# Test newest icc at time of release
 # Test icc with SIMD in mixed precision in release mode
-icc-16 msvc-2015 fftpack simd=avx2_256 release
+icc-18 msvc-2017 fftpack simd=avx2_256 release
+
+# Test ARM HPC compier toolchain with gcc-7
+#gcc-7 armhpc-18.2 openmp simd=ARM_NEON_ASIMD release
+
+# Test ARM HPC compier toolchain with armclang
+#armclang-18.2 armhpc-18.2 openmp simd=ARM_NEON_ASIMD release-with-assert
 
 # TODO
 # Add SIMD + OpenMP + CUDA asan build