src/gromacs/simd/impl_x86_mic/impl_x86_mic_util_float.h

   1 /*
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   4  * Copyright (c) 2014,2015,2016,2017,2018,2019, by the GROMACS development team, led by
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  35
  36 #ifndef GMX_SIMD_IMPL_X86_MIC_UTIL_FLOAT_H
  37 #define GMX_SIMD_IMPL_X86_MIC_UTIL_FLOAT_H
  38
  39 #include "config.h"
  40
  41 #include <cassert>
  42 #include <cstdint>
  43
  44 #include <immintrin.h>
  45
  46 #include "gromacs/utility/basedefinitions.h"
  47
  48 #include "impl_x86_mic_simd_float.h"
  49
  50 namespace gmx
  51 {
  52
  53 // On MIC it is better to use scatter operations, so we define the load routines
  54 // that use a SIMD offset variable first.
  55
  56 template<int align>
  57 static inline void gmx_simdcall gatherLoadBySimdIntTranspose(const float* base,
  58                                                              SimdFInt32   simdoffset,
  59                                                              SimdFloat*   v0,
  60                                                              SimdFloat*   v1,
  61                                                              SimdFloat*   v2,
  62                                                              SimdFloat*   v3)
  63 {
  64     assert(std::size_t(base) % 16 == 0);
  65     assert(align % 4 == 0);
  66
  67     // All instructions might be latency ~4 on MIC, so we use shifts where we
  68     // only need a single instruction (since the shift parameter is an immediate),
  69     // but multiplication otherwise.
  70     if (align == 4)
  71     {
  72         simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 2);
  73     }
  74     else if (align == 8)
  75     {
  76         simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 3);
  77     }
  78     else
  79     {
  80         simdoffset = simdoffset * SimdFInt32(align);
  81     }
  82
  83     v0->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base, sizeof(float));
  84     v1->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base + 1, sizeof(float));
  85     v2->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base + 2, sizeof(float));
  86     v3->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base + 3, sizeof(float));
  87 }
  88
  89 template<int align>
  90 static inline void gmx_simdcall
  91                    gatherLoadUBySimdIntTranspose(const float* base, SimdFInt32 simdoffset, SimdFloat* v0, SimdFloat* v1)
  92 {
  93     // All instructions might be latency ~4 on MIC, so we use shifts where we
  94     // only need a single instruction (since the shift parameter is an immediate),
  95     // but multiplication otherwise.
  96     // For align == 2 we can merge the constant into the scale parameter,
  97     // which can take constants up to 8 in total.
  98     if (align == 2)
  99     {
 100         v0->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base, align * sizeof(float));
 101         v1->simdInternal_ =
 102                 _mm512_i32gather_ps(simdoffset.simdInternal_, base + 1, align * sizeof(float));
 103     }
 104     else
 105     {
 106         if (align == 4)
 107         {
 108             simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 2);
 109         }
 110         else if (align == 8)
 111         {
 112             simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 3);
 113         }
 114         else
 115         {
 116             simdoffset = simdoffset * SimdFInt32(align);
 117         }
 118         v0->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base, sizeof(float));
 119         v1->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base + 1, sizeof(float));
 120     }
 121 }
 122
 123 template<int align>
 124 static inline void gmx_simdcall
 125                    gatherLoadBySimdIntTranspose(const float* base, SimdFInt32 simdoffset, SimdFloat* v0, SimdFloat* v1)
 126 {
 127     assert(std::size_t(base) % 8 == 0);
 128     assert(align % 2 == 0);
 129     gatherLoadUBySimdIntTranspose<align>(base, simdoffset, v0, v1);
 130 }
 131
 132 template<int align>
 133 static inline void gmx_simdcall gatherLoadTranspose(const float*       base,
 134                                                     const std::int32_t offset[],
 135                                                     SimdFloat*         v0,
 136                                                     SimdFloat*         v1,
 137                                                     SimdFloat*         v2,
 138                                                     SimdFloat*         v3)
 139 {
 140     gatherLoadBySimdIntTranspose<align>(base, simdLoad(offset, SimdFInt32Tag()), v0, v1, v2, v3);
 141 }
 142
 143 template<int align>
 144 static inline void gmx_simdcall
 145                    gatherLoadTranspose(const float* base, const std::int32_t offset[], SimdFloat* v0, SimdFloat* v1)
 146 {
 147     gatherLoadBySimdIntTranspose<align>(base, simdLoad(offset, SimdFInt32Tag()), v0, v1);
 148 }
 149
 150 static const int c_simdBestPairAlignmentFloat = 2;
 151
 152 template<int align>
 153 static inline void gmx_simdcall gatherLoadUTranspose(const float*       base,
 154                                                      const std::int32_t offset[],
 155                                                      SimdFloat*         v0,
 156                                                      SimdFloat*         v1,
 157                                                      SimdFloat*         v2)
 158 {
 159     SimdFInt32 simdoffset;
 160
 161     assert(std::size_t(offset) % 64 == 0);
 162
 163     simdoffset = simdLoad(offset, SimdFInt32Tag());
 164
 165     // All instructions might be latency ~4 on MIC, so we use shifts where we
 166     // only need a single instruction (since the shift parameter is an immediate),
 167     // but multiplication otherwise.
 168     if (align == 4)
 169     {
 170         simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 2);
 171     }
 172     else if (align == 8)
 173     {
 174         simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 3);
 175     }
 176     else
 177     {
 178         simdoffset = simdoffset * SimdFInt32(align);
 179     }
 180
 181     v0->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base, sizeof(float));
 182     v1->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base + 1, sizeof(float));
 183     v2->simdInternal_ = _mm512_i32gather_ps(simdoffset.simdInternal_, base + 2, sizeof(float));
 184 }
 185
 186
 187 template<int align>
 188 static inline void gmx_simdcall
 189                    transposeScatterStoreU(float* base, const std::int32_t offset[], SimdFloat v0, SimdFloat v1, SimdFloat v2)
 190 {
 191     SimdFInt32 simdoffset;
 192
 193     assert(std::size_t(offset) % 64 == 0);
 194
 195     simdoffset = simdLoad(offset, SimdFInt32Tag());
 196
 197     // All instructions might be latency ~4 on MIC, so we use shifts where we
 198     // only need a single instruction (since the shift parameter is an immediate),
 199     // but multiplication otherwise.
 200     if (align == 4)
 201     {
 202         simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 2);
 203     }
 204     else if (align == 8)
 205     {
 206         simdoffset.simdInternal_ = _mm512_slli_epi32(simdoffset.simdInternal_, 3);
 207     }
 208     else
 209     {
 210         simdoffset = simdoffset * SimdFInt32(align);
 211     }
 212
 213     _mm512_i32scatter_ps(base, simdoffset.simdInternal_, v0.simdInternal_, sizeof(float));
 214     _mm512_i32scatter_ps(base + 1, simdoffset.simdInternal_, v1.simdInternal_, sizeof(float));
 215     _mm512_i32scatter_ps(base + 2, simdoffset.simdInternal_, v2.simdInternal_, sizeof(float));
 216 }
 217
 218
 219 template<int align>
 220 static inline void gmx_simdcall
 221                    transposeScatterIncrU(float* base, const std::int32_t offset[], SimdFloat v0, SimdFloat v1, SimdFloat v2)
 222 {
 223     alignas(GMX_SIMD_ALIGNMENT) float rdata0[GMX_SIMD_FLOAT_WIDTH];
 224     alignas(GMX_SIMD_ALIGNMENT) float rdata1[GMX_SIMD_FLOAT_WIDTH];
 225     alignas(GMX_SIMD_ALIGNMENT) float rdata2[GMX_SIMD_FLOAT_WIDTH];
 226
 227     store(rdata0, v0);
 228     store(rdata1, v1);
 229     store(rdata2, v2);
 230
 231     for (int i = 0; i < GMX_SIMD_FLOAT_WIDTH; i++)
 232     {
 233         base[align * offset[i] + 0] += rdata0[i];
 234         base[align * offset[i] + 1] += rdata1[i];
 235         base[align * offset[i] + 2] += rdata2[i];
 236     }
 237 }
 238
 239 template<int align>
 240 static inline void gmx_simdcall
 241                    transposeScatterDecrU(float* base, const std::int32_t offset[], SimdFloat v0, SimdFloat v1, SimdFloat v2)
 242 {
 243     alignas(GMX_SIMD_ALIGNMENT) float rdata0[GMX_SIMD_FLOAT_WIDTH];
 244     alignas(GMX_SIMD_ALIGNMENT) float rdata1[GMX_SIMD_FLOAT_WIDTH];
 245     alignas(GMX_SIMD_ALIGNMENT) float rdata2[GMX_SIMD_FLOAT_WIDTH];
 246
 247     store(rdata0, v0);
 248     store(rdata1, v1);
 249     store(rdata2, v2);
 250
 251     for (int i = 0; i < GMX_SIMD_FLOAT_WIDTH; i++)
 252     {
 253         base[align * offset[i] + 0] -= rdata0[i];
 254         base[align * offset[i] + 1] -= rdata1[i];
 255         base[align * offset[i] + 2] -= rdata2[i];
 256     }
 257 }
 258
 259 static inline void gmx_simdcall expandScalarsToTriplets(SimdFloat  scalar,
 260                                                         SimdFloat* triplets0,
 261                                                         SimdFloat* triplets1,
 262                                                         SimdFloat* triplets2)
 263 {
 264     triplets0->simdInternal_ = _mm512_castsi512_ps(
 265             _mm512_permutevar_epi32(_mm512_set_epi32(5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 0, 0, 0),
 266                                     _mm512_castps_si512(scalar.simdInternal_)));
 267     triplets1->simdInternal_ = _mm512_castsi512_ps(_mm512_permutevar_epi32(
 268             _mm512_set_epi32(10, 10, 9, 9, 9, 8, 8, 8, 7, 7, 7, 6, 6, 6, 5, 5),
 269             _mm512_castps_si512(scalar.simdInternal_)));
 270     triplets2->simdInternal_ = _mm512_castsi512_ps(_mm512_permutevar_epi32(
 271             _mm512_set_epi32(15, 15, 15, 14, 14, 14, 13, 13, 13, 12, 12, 12, 11, 11, 11, 10),
 272             _mm512_castps_si512(scalar.simdInternal_)));
 273 }
 274
 275
 276 static inline float gmx_simdcall reduceIncr4ReturnSum(float* m, SimdFloat v0, SimdFloat v1, SimdFloat v2, SimdFloat v3)
 277 {
 278     float  f;
 279     __m512 t0, t1, t2, t3;
 280
 281     assert(std::size_t(m) % 16 == 0);
 282
 283     t0 = _mm512_add_ps(v0.simdInternal_, _mm512_swizzle_ps(v0.simdInternal_, _MM_SWIZ_REG_BADC));
 284     t0 = _mm512_mask_add_ps(t0, _mm512_int2mask(0xCCCC), v2.simdInternal_,
 285                             _mm512_swizzle_ps(v2.simdInternal_, _MM_SWIZ_REG_BADC));
 286     t1 = _mm512_add_ps(v1.simdInternal_, _mm512_swizzle_ps(v1.simdInternal_, _MM_SWIZ_REG_BADC));
 287     t1 = _mm512_mask_add_ps(t1, _mm512_int2mask(0xCCCC), v3.simdInternal_,
 288                             _mm512_swizzle_ps(v3.simdInternal_, _MM_SWIZ_REG_BADC));
 289     t2 = _mm512_add_ps(t0, _mm512_swizzle_ps(t0, _MM_SWIZ_REG_CDAB));
 290     t2 = _mm512_mask_add_ps(t2, _mm512_int2mask(0xAAAA), t1, _mm512_swizzle_ps(t1, _MM_SWIZ_REG_CDAB));
 291
 292     t2 = _mm512_add_ps(t2, _mm512_permute4f128_ps(t2, _MM_PERM_BADC));
 293     t2 = _mm512_add_ps(t2, _mm512_permute4f128_ps(t2, _MM_PERM_CDAB));
 294
 295     t0 = _mm512_mask_extload_ps(_mm512_undefined_ps(), _mm512_int2mask(0xF), m, _MM_UPCONV_PS_NONE,
 296                                 _MM_BROADCAST_4X16, _MM_HINT_NONE);
 297     t0 = _mm512_add_ps(t0, t2);
 298     _mm512_mask_packstorelo_ps(m, _mm512_int2mask(0xF), t0);
 299
 300     t2 = _mm512_add_ps(t2, _mm512_swizzle_ps(t2, _MM_SWIZ_REG_BADC));
 301     t2 = _mm512_add_ps(t2, _mm512_swizzle_ps(t2, _MM_SWIZ_REG_CDAB));
 302
 303     _mm512_mask_packstorelo_ps(&f, _mm512_mask2int(0x1), t2);
 304     return f;
 305 }
 306
 307 static inline SimdFloat gmx_simdcall loadDualHsimd(const float* m0, const float* m1)
 308 {
 309     assert(std::size_t(m0) % 32 == 0);
 310     assert(std::size_t(m1) % 32 == 0);
 311
 312     return _mm512_castpd_ps(_mm512_mask_extload_pd(
 313             _mm512_extload_pd(reinterpret_cast<const double*>(m0), _MM_UPCONV_PD_NONE,
 314                               _MM_BROADCAST_4X8, _MM_HINT_NONE),
 315             _mm512_int2mask(0xF0), reinterpret_cast<const double*>(m1), _MM_UPCONV_PD_NONE,
 316             _MM_BROADCAST_4X8, _MM_HINT_NONE));
 317 }
 318
 319 static inline SimdFloat gmx_simdcall loadDuplicateHsimd(const float* m)
 320 {
 321     assert(std::size_t(m) % 32 == 0);
 322
 323     return _mm512_castpd_ps(_mm512_extload_pd(reinterpret_cast<const double*>(m),
 324                                               _MM_UPCONV_PD_NONE, _MM_BROADCAST_4X8, _MM_HINT_NONE));
 325 }
 326
 327 static inline SimdFloat gmx_simdcall loadU1DualHsimd(const float* m)
 328 {
 329     return _mm512_mask_extload_ps(
 330             _mm512_extload_ps(m, _MM_UPCONV_PS_NONE, _MM_BROADCAST_1X16, _MM_HINT_NONE),
 331             _mm512_int2mask(0xFF00), m + 1, _MM_UPCONV_PS_NONE, _MM_BROADCAST_1X16, _MM_HINT_NONE);
 332 }
 333
 334
 335 static inline void gmx_simdcall storeDualHsimd(float* m0, float* m1, SimdFloat a)
 336 {
 337     __m512 t0;
 338
 339     assert(std::size_t(m0) % 32 == 0);
 340     assert(std::size_t(m1) % 32 == 0);
 341
 342     _mm512_mask_packstorelo_ps(m0, _mm512_int2mask(0x00FF), a.simdInternal_);
 343     _mm512_mask_packstorelo_ps(m1, _mm512_int2mask(0xFF00), a.simdInternal_);
 344 }
 345
 346 static inline void gmx_simdcall incrDualHsimd(float* m0, float* m1, SimdFloat a)
 347 {
 348     assert(std::size_t(m0) % 32 == 0);
 349     assert(std::size_t(m1) % 32 == 0);
 350
 351     __m512 x;
 352
 353     // Update lower half
 354     x = _mm512_castpd_ps(_mm512_extload_pd(reinterpret_cast<const double*>(m0), _MM_UPCONV_PD_NONE,
 355                                            _MM_BROADCAST_4X8, _MM_HINT_NONE));
 356     x = _mm512_add_ps(x, a.simdInternal_);
 357     _mm512_mask_packstorelo_ps(m0, _mm512_int2mask(0x00FF), x);
 358
 359     // Update upper half
 360     x = _mm512_castpd_ps(_mm512_extload_pd(reinterpret_cast<const double*>(m1), _MM_UPCONV_PD_NONE,
 361                                            _MM_BROADCAST_4X8, _MM_HINT_NONE));
 362     x = _mm512_add_ps(x, a.simdInternal_);
 363     _mm512_mask_packstorelo_ps(m1, _mm512_int2mask(0xFF00), x);
 364 }
 365
 366 static inline void gmx_simdcall decrHsimd(float* m, SimdFloat a)
 367 {
 368     __m512 t;
 369
 370     assert(std::size_t(m) % 32 == 0);
 371
 372     t = _mm512_castpd_ps(_mm512_extload_pd(reinterpret_cast<const double*>(m), _MM_UPCONV_PD_NONE,
 373                                            _MM_BROADCAST_4X8, _MM_HINT_NONE));
 374     a = _mm512_add_ps(a.simdInternal_, _mm512_permute4f128_ps(a.simdInternal_, _MM_PERM_BADC));
 375     t = _mm512_sub_ps(t, a.simdInternal_);
 376     _mm512_mask_packstorelo_ps(m, _mm512_int2mask(0x00FF), t);
 377 }
 378
 379
 380 template<int align>
 381 static inline void gmx_simdcall gatherLoadTransposeHsimd(const float*       base0,
 382                                                          const float*       base1,
 383                                                          const std::int32_t offset[],
 384                                                          SimdFloat*         v0,
 385                                                          SimdFloat*         v1)
 386 {
 387     __m512i idx0, idx1, idx;
 388     __m512  tmp1, tmp2;
 389
 390     assert(std::size_t(offset) % 32 == 0);
 391     assert(std::size_t(base0) % 8 == 0);
 392     assert(std::size_t(base1) % 8 == 0);
 393     assert(std::size_t(align) % 2 == 0);
 394
 395     idx0 = _mm512_loadunpacklo_epi32(_mm512_undefined_epi32(), offset);
 396
 397     idx0 = _mm512_mullo_epi32(idx0, _mm512_set1_epi32(align));
 398     idx1 = _mm512_add_epi32(idx0, _mm512_set1_epi32(1));
 399
 400     idx = _mm512_mask_permute4f128_epi32(idx0, _mm512_int2mask(0xFF00), idx1, _MM_PERM_BABA);
 401
 402     tmp1 = _mm512_i32gather_ps(idx, base0, sizeof(float));
 403     tmp2 = _mm512_i32gather_ps(idx, base1, sizeof(float));
 404
 405     v0->simdInternal_ = _mm512_mask_permute4f128_ps(tmp1, _mm512_int2mask(0xFF00), tmp2, _MM_PERM_BABA);
 406     v1->simdInternal_ = _mm512_mask_permute4f128_ps(tmp2, _mm512_int2mask(0x00FF), tmp1, _MM_PERM_DCDC);
 407 }
 408
 409 static inline float gmx_simdcall reduceIncr4ReturnSumHsimd(float* m, SimdFloat v0, SimdFloat v1)
 410 {
 411     float  f;
 412     __m512 t0, t1;
 413
 414     assert(std::size_t(m) % 32 == 0);
 415
 416     t0 = _mm512_add_ps(v0.simdInternal_, _mm512_swizzle_ps(v0.simdInternal_, _MM_SWIZ_REG_BADC));
 417     t0 = _mm512_mask_add_ps(t0, _mm512_int2mask(0xCCCC), v1.simdInternal_,
 418                             _mm512_swizzle_ps(v1.simdInternal_, _MM_SWIZ_REG_BADC));
 419     t0 = _mm512_add_ps(t0, _mm512_swizzle_ps(t0, _MM_SWIZ_REG_CDAB));
 420     t0 = _mm512_add_ps(t0, _mm512_castpd_ps(_mm512_swizzle_pd(_mm512_castps_pd(t0), _MM_SWIZ_REG_BADC)));
 421     t0 = _mm512_mask_permute4f128_ps(t0, _mm512_int2mask(0xAAAA), t0, _MM_PERM_BADC);
 422     t1 = _mm512_mask_extload_ps(_mm512_undefined_ps(), _mm512_int2mask(0xF), m, _MM_UPCONV_PS_NONE,
 423                                 _MM_BROADCAST_4X16, _MM_HINT_NONE);
 424     t1 = _mm512_add_ps(t1, t0);
 425     _mm512_mask_packstorelo_ps(m, _mm512_int2mask(0xF), t1);
 426
 427     t0 = _mm512_add_ps(t0, _mm512_swizzle_ps(t0, _MM_SWIZ_REG_BADC));
 428     t0 = _mm512_add_ps(t0, _mm512_swizzle_ps(t0, _MM_SWIZ_REG_CDAB));
 429
 430     _mm512_mask_packstorelo_ps(&f, _mm512_mask2int(0x1), t0);
 431     return f;
 432 }
 433
 434 } // namespace gmx
 435
 436 #endif // GMX_SIMD_IMPL_X86_MIC_UTIL_FLOAT_H