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36 #ifndef GMX_SIMD_IMPL_SPARC64_HPC_ACE_COMMON_H
37 #define GMX_SIMD_IMPL_SPARC64_HPC_ACE_COMMON_H
39 /* Capability definitions for Sparc64 HPC-ACE */
40 /* HPC-ACE is actually double-only on the register level, but we also implement
41 * a single-precision interface where we only offer single-precision accuracy
42 * in math functions - this can save quite a few cycles.
45 #define GMX_SIMD_HAVE_FLOAT 1
46 #define GMX_SIMD_HAVE_DOUBLE 1
47 #define GMX_SIMD_HAVE_LOADU 0
48 #define GMX_SIMD_HAVE_STOREU 0
49 #define GMX_SIMD_HAVE_LOGICAL 1
50 #define GMX_SIMD_HAVE_FMA 1
51 #define GMX_SIMD_HAVE_FINT32_EXTRACT 1
52 #define GMX_SIMD_HAVE_FINT32_LOGICAL 1
53 #define GMX_SIMD_HAVE_FINT32_ARITHMETICS 0
54 #define GMX_SIMD_HAVE_DINT32_EXTRACT 1
55 #define GMX_SIMD_HAVE_DINT32_LOGICAL 1
56 #define GMX_SIMD_HAVE_DINT32_ARITHMETICS 0
57 #define GMX_SIMD4_HAVE_FLOAT 0
58 #define GMX_SIMD4_HAVE_DOUBLE 0
60 /* Implementation details */
61 #define GMX_SIMD_FLOAT_WIDTH 2
62 #define GMX_SIMD_DOUBLE_WIDTH 2
63 #define GMX_SIMD_FINT32_WIDTH 2
64 #define GMX_SIMD_DINT32_WIDTH 2
65 /* No SIMD4 support in either single or double */
66 #define GMX_SIMD_RSQRT_BITS 10
67 #define GMX_SIMD_RCP_BITS 9
69 #endif /* GMX_SIMD_IMPL_SPARC64_HPC_ACE_COMMON_H */