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40 * \ingroup module_nbnxm
44 #include "nbnxm_sycl_kernel.h"
46 #include "gromacs/gpu_utils/devicebuffer.h"
47 #include "gromacs/gpu_utils/gmxsycl.h"
48 #include "gromacs/math/functions.h"
49 #include "gromacs/mdtypes/simulation_workload.h"
50 #include "gromacs/pbcutil/ishift.h"
51 #include "gromacs/utility/template_mp.h"
53 #include "nbnxm_sycl_kernel_utils.h"
54 #include "nbnxm_sycl_types.h"
56 //! \brief Class name for NBNXM kernel
57 template<bool doPruneNBL, bool doCalcEnergies, enum Nbnxm::ElecType elecType, enum Nbnxm::VdwType vdwType>
63 //! \brief Set of boolean constants mimicking preprocessor macros.
64 template<enum ElecType elecType, enum VdwType vdwType>
65 struct EnergyFunctionProperties {
66 static constexpr bool elecCutoff = (elecType == ElecType::Cut); ///< EL_CUTOFF
67 static constexpr bool elecRF = (elecType == ElecType::RF); ///< EL_RF
68 static constexpr bool elecEwaldAna =
69 (elecType == ElecType::EwaldAna || elecType == ElecType::EwaldAnaTwin); ///< EL_EWALD_ANA
70 static constexpr bool elecEwaldTab =
71 (elecType == ElecType::EwaldTab || elecType == ElecType::EwaldTabTwin); ///< EL_EWALD_TAB
72 static constexpr bool elecEwaldTwin =
73 (elecType == ElecType::EwaldAnaTwin || elecType == ElecType::EwaldTabTwin);
74 static constexpr bool elecEwald = (elecEwaldAna || elecEwaldTab); ///< EL_EWALD_ANY
75 static constexpr bool vdwCombLB = (vdwType == VdwType::CutCombLB);
76 static constexpr bool vdwCombGeom = (vdwType == VdwType::CutCombGeom); ///< LJ_COMB_GEOM
77 static constexpr bool vdwComb = (vdwCombLB || vdwCombGeom); ///< LJ_COMB
78 static constexpr bool vdwEwaldCombGeom = (vdwType == VdwType::EwaldGeom); ///< LJ_EWALD_COMB_GEOM
79 static constexpr bool vdwEwaldCombLB = (vdwType == VdwType::EwaldLB); ///< LJ_EWALD_COMB_LB
80 static constexpr bool vdwEwald = (vdwEwaldCombGeom || vdwEwaldCombLB); ///< LJ_EWALD
81 static constexpr bool vdwFSwitch = (vdwType == VdwType::FSwitch); ///< LJ_FORCE_SWITCH
82 static constexpr bool vdwPSwitch = (vdwType == VdwType::PSwitch); ///< LJ_POT_SWITCH
85 //! \brief Templated constants to shorten kernel function declaration.
87 template<enum VdwType vdwType>
88 constexpr bool ljComb = EnergyFunctionProperties<ElecType::Count, vdwType>().vdwComb;
90 template<enum ElecType elecType> // Yes, ElecType
91 constexpr bool vdwCutoffCheck = EnergyFunctionProperties<elecType, VdwType::Count>().elecEwaldTwin;
93 template<enum ElecType elecType>
94 constexpr bool elecEwald = EnergyFunctionProperties<elecType, VdwType::Count>().elecEwald;
96 template<enum ElecType elecType>
97 constexpr bool elecEwaldTab = EnergyFunctionProperties<elecType, VdwType::Count>().elecEwaldTab;
99 template<enum VdwType vdwType>
100 constexpr bool ljEwald = EnergyFunctionProperties<ElecType::Count, vdwType>().vdwEwald;
103 using cl::sycl::access::fence_space;
104 using cl::sycl::access::mode;
105 using cl::sycl::access::target;
107 static inline Float2 convertSigmaEpsilonToC6C12(const float sigma, const float epsilon)
109 const float sigma2 = sigma * sigma;
110 const float sigma6 = sigma2 * sigma2 * sigma2;
111 const float c6 = epsilon * sigma6;
112 const float c12 = c6 * sigma6;
114 return Float2(c6, c12);
117 template<bool doCalcEnergies>
118 static inline void ljForceSwitch(const shift_consts_t dispersionShift,
119 const shift_consts_t repulsionShift,
120 const float rVdwSwitch,
125 cl::sycl::private_ptr<float> fInvR,
126 cl::sycl::private_ptr<float> eLJ)
128 /* force switch constants */
129 const float dispShiftV2 = dispersionShift.c2;
130 const float dispShiftV3 = dispersionShift.c3;
131 const float repuShiftV2 = repulsionShift.c2;
132 const float repuShiftV3 = repulsionShift.c3;
134 const float r = r2 * rInv;
135 const float rSwitch = cl::sycl::fdim(r, rVdwSwitch); // max(r - rVdwSwitch, 0)
137 *fInvR += -c6 * (dispShiftV2 + dispShiftV3 * rSwitch) * rSwitch * rSwitch * rInv
138 + c12 * (repuShiftV2 + repuShiftV3 * rSwitch) * rSwitch * rSwitch * rInv;
140 if constexpr (doCalcEnergies)
142 const float dispShiftF2 = dispShiftV2 / 3;
143 const float dispShiftF3 = dispShiftV3 / 4;
144 const float repuShiftF2 = repuShiftV2 / 3;
145 const float repuShiftF3 = repuShiftV3 / 4;
146 *eLJ += c6 * (dispShiftF2 + dispShiftF3 * rSwitch) * rSwitch * rSwitch * rSwitch
147 - c12 * (repuShiftF2 + repuShiftF3 * rSwitch) * rSwitch * rSwitch * rSwitch;
151 //! \brief Fetch C6 grid contribution coefficients and return the product of these.
152 template<enum VdwType vdwType>
153 static inline float calculateLJEwaldC6Grid(const DeviceAccessor<Float2, mode::read> a_nbfpComb,
157 if constexpr (vdwType == VdwType::EwaldGeom)
159 return a_nbfpComb[typeI][0] * a_nbfpComb[typeJ][0];
163 static_assert(vdwType == VdwType::EwaldLB);
164 /* sigma and epsilon are scaled to give 6*C6 */
165 const Float2 c6c12_i = a_nbfpComb[typeI];
166 const Float2 c6c12_j = a_nbfpComb[typeJ];
168 const float sigma = c6c12_i[0] + c6c12_j[0];
169 const float epsilon = c6c12_i[1] * c6c12_j[1];
171 const float sigma2 = sigma * sigma;
172 return epsilon * sigma2 * sigma2 * sigma2;
176 //! Calculate LJ-PME grid force contribution with geometric or LB combination rule.
177 template<bool doCalcEnergies, enum VdwType vdwType>
178 static inline void ljEwaldComb(const DeviceAccessor<Float2, mode::read> a_nbfpComb,
179 const float sh_lj_ewald,
184 const float lje_coeff2,
185 const float lje_coeff6_6,
187 cl::sycl::private_ptr<float> fInvR,
188 cl::sycl::private_ptr<float> eLJ)
190 const float c6grid = calculateLJEwaldC6Grid<vdwType>(a_nbfpComb, typeI, typeJ);
192 /* Recalculate inv_r6 without exclusion mask */
193 const float inv_r6_nm = r2Inv * r2Inv * r2Inv;
194 const float cr2 = lje_coeff2 * r2;
195 const float expmcr2 = cl::sycl::exp(-cr2);
196 const float poly = 1.0F + cr2 + 0.5F * cr2 * cr2;
198 /* Subtract the grid force from the total LJ force */
199 *fInvR += c6grid * (inv_r6_nm - expmcr2 * (inv_r6_nm * poly + lje_coeff6_6)) * r2Inv;
201 if constexpr (doCalcEnergies)
203 /* Shift should be applied only to real LJ pairs */
204 const float sh_mask = sh_lj_ewald * int_bit;
205 *eLJ += c_oneSixth * c6grid * (inv_r6_nm * (1.0F - expmcr2 * poly) + sh_mask);
209 /*! \brief Apply potential switch. */
210 template<bool doCalcEnergies>
211 static inline void ljPotentialSwitch(const switch_consts_t vdwSwitch,
212 const float rVdwSwitch,
215 cl::sycl::private_ptr<float> fInvR,
216 cl::sycl::private_ptr<float> eLJ)
218 /* potential switch constants */
219 const float switchV3 = vdwSwitch.c3;
220 const float switchV4 = vdwSwitch.c4;
221 const float switchV5 = vdwSwitch.c5;
222 const float switchF2 = 3 * vdwSwitch.c3;
223 const float switchF3 = 4 * vdwSwitch.c4;
224 const float switchF4 = 5 * vdwSwitch.c5;
226 const float r = r2 * rInv;
227 const float rSwitch = r - rVdwSwitch;
232 1.0F + (switchV3 + (switchV4 + switchV5 * rSwitch) * rSwitch) * rSwitch * rSwitch * rSwitch;
233 const float dsw = (switchF2 + (switchF3 + switchF4 * rSwitch) * rSwitch) * rSwitch * rSwitch;
235 *fInvR = (*fInvR) * sw - rInv * (*eLJ) * dsw;
236 if constexpr (doCalcEnergies)
244 /*! \brief Calculate analytical Ewald correction term. */
245 static inline float pmeCorrF(const float z2)
247 constexpr float FN6 = -1.7357322914161492954e-8F;
248 constexpr float FN5 = 1.4703624142580877519e-6F;
249 constexpr float FN4 = -0.000053401640219807709149F;
250 constexpr float FN3 = 0.0010054721316683106153F;
251 constexpr float FN2 = -0.019278317264888380590F;
252 constexpr float FN1 = 0.069670166153766424023F;
253 constexpr float FN0 = -0.75225204789749321333F;
255 constexpr float FD4 = 0.0011193462567257629232F;
256 constexpr float FD3 = 0.014866955030185295499F;
257 constexpr float FD2 = 0.11583842382862377919F;
258 constexpr float FD1 = 0.50736591960530292870F;
259 constexpr float FD0 = 1.0F;
261 const float z4 = z2 * z2;
263 float polyFD0 = FD4 * z4 + FD2;
264 const float polyFD1 = FD3 * z4 + FD1;
265 polyFD0 = polyFD0 * z4 + FD0;
266 polyFD0 = polyFD1 * z2 + polyFD0;
268 polyFD0 = 1.0F / polyFD0;
270 float polyFN0 = FN6 * z4 + FN4;
271 float polyFN1 = FN5 * z4 + FN3;
272 polyFN0 = polyFN0 * z4 + FN2;
273 polyFN1 = polyFN1 * z4 + FN1;
274 polyFN0 = polyFN0 * z4 + FN0;
275 polyFN0 = polyFN1 * z2 + polyFN0;
277 return polyFN0 * polyFD0;
280 /*! \brief Linear interpolation using exactly two FMA operations.
282 * Implements numeric equivalent of: (1-t)*d0 + t*d1.
285 static inline T lerp(T d0, T d1, T t)
287 return fma(t, d1, fma(-t, d0, d0));
290 /*! \brief Interpolate Ewald coulomb force correction using the F*r table. */
291 static inline float interpolateCoulombForceR(const DeviceAccessor<float, mode::read> a_coulombTab,
292 const float coulombTabScale,
295 const float normalized = coulombTabScale * r;
296 const int index = static_cast<int>(normalized);
297 const float fraction = normalized - index;
299 const float left = a_coulombTab[index];
300 const float right = a_coulombTab[index + 1];
302 return lerp(left, right, fraction); // TODO: cl::sycl::mix
305 /*! \brief Reduce c_clSize j-force components using shifts and atomically accumulate into a_f.
307 * c_clSize consecutive threads hold the force components of a j-atom which we
308 * reduced in log2(cl_Size) steps using shift and atomically accumulate them into \p a_f.
310 static inline void reduceForceJShuffle(Float3 f,
311 const cl::sycl::nd_item<1> itemIdx,
314 DeviceAccessor<float, mode_atomic> a_f)
316 static_assert(c_clSize == 8 || c_clSize == 4);
317 sycl_2020::sub_group sg = itemIdx.get_sub_group();
319 f[0] += sycl_2020::shift_left(sg, f[0], 1);
320 f[1] += sycl_2020::shift_right(sg, f[1], 1);
321 f[2] += sycl_2020::shift_left(sg, f[2], 1);
327 f[0] += sycl_2020::shift_left(sg, f[0], 2);
328 f[2] += sycl_2020::shift_right(sg, f[2], 2);
334 if constexpr (c_clSize == 8)
336 f[0] += sycl_2020::shift_left(sg, f[0], 4);
341 atomicFetchAdd(a_f, 3 * aidx + tidxi, f[0]);
345 // This function also requires sm_buf to have a length of at least 1.
346 // The function returns:
347 // - for thread #0 in the group: sum of all valueToReduce in a group
348 // - for other threads: unspecified
349 template<int subGroupSize, int groupSize>
350 static inline float groupReduce(const cl::sycl::nd_item<1> itemIdx,
351 const unsigned int tidxi,
352 cl::sycl::accessor<float, 1, mode::read_write, target::local> sm_buf,
355 constexpr int numSubGroupsInGroup = groupSize / subGroupSize;
356 static_assert(numSubGroupsInGroup == 1 || numSubGroupsInGroup == 2);
357 sycl_2020::sub_group sg = itemIdx.get_sub_group();
358 valueToReduce = sycl_2020::group_reduce(sg, valueToReduce, sycl_2020::plus<float>());
359 // If we have two sub-groups, we should reduce across them.
360 if constexpr (numSubGroupsInGroup == 2)
362 if (tidxi == subGroupSize)
364 sm_buf[0] = valueToReduce;
366 itemIdx.barrier(fence_space::local_space);
369 valueToReduce += sm_buf[0];
372 return valueToReduce;
375 /*! \brief Reduce c_clSize j-force components using local memory and atomically accumulate into a_f.
377 * c_clSize consecutive threads hold the force components of a j-atom which we
378 * reduced in cl_Size steps using shift and atomically accumulate them into \p a_f.
380 * TODO: implement binary reduction flavor for the case where cl_Size is power of two.
382 static inline void reduceForceJGeneric(cl::sycl::accessor<float, 1, mode::read_write, target::local> sm_buf,
384 const cl::sycl::nd_item<1> itemIdx,
388 DeviceAccessor<float, mode_atomic> a_f)
390 static constexpr int sc_fBufferStride = c_clSizeSq;
391 int tidx = tidxi + tidxj * c_clSize;
392 sm_buf[0 * sc_fBufferStride + tidx] = f[0];
393 sm_buf[1 * sc_fBufferStride + tidx] = f[1];
394 sm_buf[2 * sc_fBufferStride + tidx] = f[2];
396 subGroupBarrier(itemIdx);
398 // reducing data 8-by-by elements on the leader of same threads as those storing above
399 assert(itemIdx.get_sub_group().get_local_range().size() >= c_clSize);
404 for (int j = tidxj * c_clSize; j < (tidxj + 1) * c_clSize; j++)
406 fSum += sm_buf[sc_fBufferStride * tidxi + j];
409 atomicFetchAdd(a_f, 3 * aidx + tidxi, fSum);
414 /*! \brief Reduce c_clSize j-force components using either shifts or local memory and atomically accumulate into a_f.
416 static inline void reduceForceJ(cl::sycl::accessor<float, 1, mode::read_write, target::local> sm_buf,
418 const cl::sycl::nd_item<1> itemIdx,
422 DeviceAccessor<float, mode_atomic> a_f)
424 if constexpr (!gmx::isPowerOfTwo(c_nbnxnGpuNumClusterPerSupercluster))
426 reduceForceJGeneric(sm_buf, f, itemIdx, tidxi, tidxj, aidx, a_f);
430 reduceForceJShuffle(f, itemIdx, tidxi, aidx, a_f);
435 /*! \brief Final i-force reduction.
437 * Reduce c_nbnxnGpuNumClusterPerSupercluster i-force componets stored in \p fCiBuf[]
438 * accumulating atomically into \p a_f.
439 * If \p calcFShift is true, further reduce shift forces and atomically accumulate into \p a_fShift.
441 * This implementation works only with power of two array sizes.
443 static inline void reduceForceIAndFShift(cl::sycl::accessor<float, 1, mode::read_write, target::local> sm_buf,
444 const Float3 fCiBuf[c_nbnxnGpuNumClusterPerSupercluster],
445 const bool calcFShift,
446 const cl::sycl::nd_item<1> itemIdx,
451 DeviceAccessor<float, mode_atomic> a_f,
452 DeviceAccessor<float, mode_atomic> a_fShift)
454 // must have power of two elements in fCiBuf
455 static_assert(gmx::isPowerOfTwo(c_nbnxnGpuNumClusterPerSupercluster));
457 static constexpr int bufStride = c_clSize * c_clSize;
458 static constexpr int clSizeLog2 = gmx::StaticLog2<c_clSize>::value;
459 const int tidx = tidxi + tidxj * c_clSize;
460 float fShiftBuf = 0.0F;
461 for (int ciOffset = 0; ciOffset < c_nbnxnGpuNumClusterPerSupercluster; ciOffset++)
463 const int aidx = (sci * c_nbnxnGpuNumClusterPerSupercluster + ciOffset) * c_clSize + tidxi;
464 /* store i forces in shmem */
465 sm_buf[tidx] = fCiBuf[ciOffset][0];
466 sm_buf[bufStride + tidx] = fCiBuf[ciOffset][1];
467 sm_buf[2 * bufStride + tidx] = fCiBuf[ciOffset][2];
468 itemIdx.barrier(fence_space::local_space);
470 /* Reduce the initial c_clSize values for each i atom to half
471 * every step by using c_clSize * i threads. */
472 int i = c_clSize / 2;
473 for (int j = clSizeLog2 - 1; j > 0; j--)
477 sm_buf[tidxj * c_clSize + tidxi] += sm_buf[(tidxj + i) * c_clSize + tidxi];
478 sm_buf[bufStride + tidxj * c_clSize + tidxi] +=
479 sm_buf[bufStride + (tidxj + i) * c_clSize + tidxi];
480 sm_buf[2 * bufStride + tidxj * c_clSize + tidxi] +=
481 sm_buf[2 * bufStride + (tidxj + i) * c_clSize + tidxi];
484 itemIdx.barrier(fence_space::local_space);
487 /* i == 1, last reduction step, writing to global mem */
488 /* Split the reduction between the first 3 line threads
489 Threads with line id 0 will do the reduction for (float3).x components
490 Threads with line id 1 will do the reduction for (float3).y components
491 Threads with line id 2 will do the reduction for (float3).z components. */
495 sm_buf[tidxj * bufStride + tidxi] + sm_buf[tidxj * bufStride + c_clSize + tidxi];
496 atomicFetchAdd(a_f, 3 * aidx + tidxj, f);
502 itemIdx.barrier(fence_space::local_space);
504 /* add up local shift forces into global mem */
507 /* Only threads with tidxj < 3 will update fshift.
508 The threads performing the update must be the same as the threads
509 storing the reduction result above. */
512 if constexpr (c_clSize == 4)
514 /* Intel Xe (Gen12LP) and earlier GPUs implement floating-point atomics via
515 * a compare-and-swap (CAS) loop. It has particularly poor performance when
516 * updating the same memory location from the same work-group.
517 * Such optimization might be slightly beneficial for NVIDIA and AMD as well,
518 * but it is unlikely to make a big difference and thus was not evaluated.
520 auto sg = itemIdx.get_sub_group();
521 fShiftBuf += sycl_2020::shift_left(sg, fShiftBuf, 1);
522 fShiftBuf += sycl_2020::shift_left(sg, fShiftBuf, 2);
525 atomicFetchAdd(a_fShift, 3 * shift + tidxj, fShiftBuf);
530 atomicFetchAdd(a_fShift, 3 * shift + tidxj, fShiftBuf);
536 /*! \brief Main kernel for NBNXM.
539 template<bool doPruneNBL, bool doCalcEnergies, enum ElecType elecType, enum VdwType vdwType>
540 auto nbnxmKernel(cl::sycl::handler& cgh,
541 DeviceAccessor<Float4, mode::read> a_xq,
542 DeviceAccessor<float, mode_atomic> a_f,
543 DeviceAccessor<Float3, mode::read> a_shiftVec,
544 DeviceAccessor<float, mode_atomic> a_fShift,
545 OptionalAccessor<float, mode_atomic, doCalcEnergies> a_energyElec,
546 OptionalAccessor<float, mode_atomic, doCalcEnergies> a_energyVdw,
547 DeviceAccessor<nbnxn_cj4_t, doPruneNBL ? mode::read_write : mode::read> a_plistCJ4,
548 DeviceAccessor<nbnxn_sci_t, mode::read> a_plistSci,
549 DeviceAccessor<nbnxn_excl_t, mode::read> a_plistExcl,
550 OptionalAccessor<Float2, mode::read, ljComb<vdwType>> a_ljComb,
551 OptionalAccessor<int, mode::read, !ljComb<vdwType>> a_atomTypes,
552 OptionalAccessor<Float2, mode::read, !ljComb<vdwType>> a_nbfp,
553 OptionalAccessor<Float2, mode::read, ljEwald<vdwType>> a_nbfpComb,
554 OptionalAccessor<float, mode::read, elecEwaldTab<elecType>> a_coulombTab,
556 const float rCoulombSq,
559 const float ewaldBeta,
560 const float rlistOuterSq,
561 const float ewaldShift,
563 const float ewaldCoeffLJ,
565 const shift_consts_t dispersionShift,
566 const shift_consts_t repulsionShift,
567 const switch_consts_t vdwSwitch,
568 const float rVdwSwitch,
569 const float ljEwaldShift,
570 const float coulombTabScale,
571 const bool calcShift)
573 static constexpr EnergyFunctionProperties<elecType, vdwType> props;
577 cgh.require(a_shiftVec);
578 cgh.require(a_fShift);
579 if constexpr (doCalcEnergies)
581 cgh.require(a_energyElec);
582 cgh.require(a_energyVdw);
584 cgh.require(a_plistCJ4);
585 cgh.require(a_plistSci);
586 cgh.require(a_plistExcl);
587 if constexpr (!props.vdwComb)
589 cgh.require(a_atomTypes);
594 cgh.require(a_ljComb);
596 if constexpr (props.vdwEwald)
598 cgh.require(a_nbfpComb);
600 if constexpr (props.elecEwaldTab)
602 cgh.require(a_coulombTab);
605 // shmem buffer for i x+q pre-loading
606 cl::sycl::accessor<Float4, 2, mode::read_write, target::local> sm_xq(
607 cl::sycl::range<2>(c_nbnxnGpuNumClusterPerSupercluster, c_clSize), cgh);
609 // shmem buffer for force reduction
610 // SYCL-TODO: Make into 3D; section 4.7.6.11 of SYCL2020 specs
611 cl::sycl::accessor<float, 1, mode::read_write, target::local> sm_reductionBuffer(
612 cl::sycl::range<1>(c_clSize * c_clSize * DIM), cgh);
614 auto sm_atomTypeI = [&]() {
615 if constexpr (!props.vdwComb)
617 return cl::sycl::accessor<int, 2, mode::read_write, target::local>(
618 cl::sycl::range<2>(c_nbnxnGpuNumClusterPerSupercluster, c_clSize), cgh);
626 auto sm_ljCombI = [&]() {
627 if constexpr (props.vdwComb)
629 return cl::sycl::accessor<Float2, 2, mode::read_write, target::local>(
630 cl::sycl::range<2>(c_nbnxnGpuNumClusterPerSupercluster, c_clSize), cgh);
638 /* Flag to control the calculation of exclusion forces in the kernel
639 * We do that with Ewald (elec/vdw) and RF. Cut-off only has exclusion
641 constexpr bool doExclusionForces =
642 (props.elecEwald || props.elecRF || props.vdwEwald || (props.elecCutoff && doCalcEnergies));
644 // The post-prune j-i cluster-pair organization is linked to how exclusion and interaction mask data is stored.
645 // Currently this is ideally suited for 32-wide subgroup size but slightly less so for others,
646 // e.g. subGroupSize > prunedClusterPairSize on AMD GCN / CDNA.
647 // Hence, the two are decoupled.
648 // When changing this code, please update requiredSubGroupSizeForNbnxm in src/gromacs/hardware/device_management_sycl.cpp.
649 constexpr int prunedClusterPairSize = c_clSize * c_splitClSize;
650 #if defined(HIPSYCL_PLATFORM_ROCM) // SYCL-TODO AMD RDNA/RDNA2 has 32-wide exec; how can we check for that?
651 gmx_unused constexpr int subGroupSize = c_clSize * c_clSize;
653 gmx_unused constexpr int subGroupSize = prunedClusterPairSize;
656 return [=](cl::sycl::nd_item<1> itemIdx) [[intel::reqd_sub_group_size(subGroupSize)]]
658 /* thread/block/warp id-s */
659 const cl::sycl::id<3> localId = unflattenId<c_clSize, c_clSize>(itemIdx.get_local_id());
660 const unsigned tidxi = localId[0];
661 const unsigned tidxj = localId[1];
662 const unsigned tidx = tidxj * c_clSize + tidxi;
663 const unsigned tidxz = 0;
665 // Group indexing was flat originally, no need to unflatten it.
666 const unsigned bidx = itemIdx.get_group(0);
668 const sycl_2020::sub_group sg = itemIdx.get_sub_group();
669 // Could use sg.get_group_range to compute the imask & exclusion Idx, but too much of the logic relies on it anyway
670 // and in cases where prunedClusterPairSize != subGroupSize we can't use it anyway
671 const unsigned imeiIdx = tidx / prunedClusterPairSize;
673 Float3 fCiBuf[c_nbnxnGpuNumClusterPerSupercluster]; // i force buffer
674 for (int i = 0; i < c_nbnxnGpuNumClusterPerSupercluster; i++)
676 fCiBuf[i] = Float3(0.0F, 0.0F, 0.0F);
679 const nbnxn_sci_t nbSci = a_plistSci[bidx];
680 const int sci = nbSci.sci;
681 const int cij4Start = nbSci.cj4_ind_start;
682 const int cij4End = nbSci.cj4_ind_end;
684 // Only needed if props.elecEwaldAna
685 const float beta2 = ewaldBeta * ewaldBeta;
686 const float beta3 = ewaldBeta * ewaldBeta * ewaldBeta;
688 for (int i = 0; i < c_nbnxnGpuNumClusterPerSupercluster; i += c_clSize)
690 /* Pre-load i-atom x and q into shared memory */
691 const int ci = sci * c_nbnxnGpuNumClusterPerSupercluster + tidxj + i;
692 const int ai = ci * c_clSize + tidxi;
693 const cl::sycl::id<2> cacheIdx = cl::sycl::id<2>(tidxj + i, tidxi);
695 const Float3 shift = a_shiftVec[nbSci.shift];
696 Float4 xqi = a_xq[ai];
697 xqi += Float4(shift[0], shift[1], shift[2], 0.0F);
699 sm_xq[cacheIdx] = xqi;
701 if constexpr (!props.vdwComb)
703 // Pre-load the i-atom types into shared memory
704 sm_atomTypeI[cacheIdx] = a_atomTypes[ai];
708 // Pre-load the LJ combination parameters into shared memory
709 sm_ljCombI[cacheIdx] = a_ljComb[ai];
712 itemIdx.barrier(fence_space::local_space);
714 float ewaldCoeffLJ_2, ewaldCoeffLJ_6_6; // Only needed if (props.vdwEwald)
715 if constexpr (props.vdwEwald)
717 ewaldCoeffLJ_2 = ewaldCoeffLJ * ewaldCoeffLJ;
718 ewaldCoeffLJ_6_6 = ewaldCoeffLJ_2 * ewaldCoeffLJ_2 * ewaldCoeffLJ_2 * c_oneSixth;
721 float energyVdw, energyElec; // Only needed if (doCalcEnergies)
722 if constexpr (doCalcEnergies)
724 energyVdw = energyElec = 0.0F;
726 if constexpr (doCalcEnergies && doExclusionForces)
728 if (nbSci.shift == gmx::c_centralShiftIndex
729 && a_plistCJ4[cij4Start].cj[0] == sci * c_nbnxnGpuNumClusterPerSupercluster)
731 // we have the diagonal: add the charge and LJ self interaction energy term
732 for (int i = 0; i < c_nbnxnGpuNumClusterPerSupercluster; i++)
734 // TODO: Are there other options?
735 if constexpr (props.elecEwald || props.elecRF || props.elecCutoff)
737 const float qi = sm_xq[i][tidxi][3];
738 energyElec += qi * qi;
740 if constexpr (props.vdwEwald)
743 a_nbfp[a_atomTypes[(sci * c_nbnxnGpuNumClusterPerSupercluster + i) * c_clSize + tidxi]
744 * (numTypes + 1)][0];
747 /* divide the self term(s) equally over the j-threads, then multiply with the coefficients. */
748 if constexpr (props.vdwEwald)
750 energyVdw /= c_clSize;
751 energyVdw *= 0.5F * c_oneSixth * ewaldCoeffLJ_6_6; // c_OneTwelfth?
753 if constexpr (props.elecRF || props.elecCutoff)
755 // Correct for epsfac^2 due to adding qi^2 */
756 energyElec /= epsFac * c_clSize;
757 energyElec *= -0.5F * cRF;
759 if constexpr (props.elecEwald)
761 // Correct for epsfac^2 due to adding qi^2 */
762 energyElec /= epsFac * c_clSize;
763 energyElec *= -ewaldBeta * c_OneOverSqrtPi; /* last factor 1/sqrt(pi) */
765 } // (nbSci.shift == gmx::c_centralShiftIndex && a_plistCJ4[cij4Start].cj[0] == sci * c_nbnxnGpuNumClusterPerSupercluster)
766 } // (doCalcEnergies && doExclusionForces)
768 // Only needed if (doExclusionForces)
769 const bool nonSelfInteraction = !(nbSci.shift == gmx::c_centralShiftIndex & tidxj <= tidxi);
771 // loop over the j clusters = seen by any of the atoms in the current super-cluster
772 for (int j4 = cij4Start + tidxz; j4 < cij4End; j4 += 1)
774 unsigned imask = a_plistCJ4[j4].imei[imeiIdx].imask;
775 if (!doPruneNBL && !imask)
779 const int wexclIdx = a_plistCJ4[j4].imei[imeiIdx].excl_ind;
780 static_assert(gmx::isPowerOfTwo(prunedClusterPairSize));
781 const unsigned wexcl = a_plistExcl[wexclIdx].pair[tidx & (prunedClusterPairSize - 1)];
782 for (int jm = 0; jm < c_nbnxnGpuJgroupSize; jm++)
785 imask & (superClInteractionMask << (jm * c_nbnxnGpuNumClusterPerSupercluster));
790 unsigned maskJI = (1U << (jm * c_nbnxnGpuNumClusterPerSupercluster));
791 const int cj = a_plistCJ4[j4].cj[jm];
792 const int aj = cj * c_clSize + tidxj;
795 const Float4 xqj = a_xq[aj];
797 const Float3 xj(xqj[0], xqj[1], xqj[2]);
798 const float qj = xqj[3];
799 int atomTypeJ; // Only needed if (!props.vdwComb)
800 Float2 ljCombJ; // Only needed if (props.vdwComb)
801 if constexpr (props.vdwComb)
803 ljCombJ = a_ljComb[aj];
807 atomTypeJ = a_atomTypes[aj];
810 Float3 fCjBuf(0.0F, 0.0F, 0.0F);
812 for (int i = 0; i < c_nbnxnGpuNumClusterPerSupercluster; i++)
817 const int ci = sci * c_nbnxnGpuNumClusterPerSupercluster + i;
818 // all threads load an atom from i cluster ci into shmem!
819 const Float4 xqi = sm_xq[i][tidxi];
820 const Float3 xi(xqi[0], xqi[1], xqi[2]);
822 // distance between i and j atoms
823 const Float3 rv = xi - xj;
824 float r2 = norm2(rv);
826 if constexpr (doPruneNBL)
828 /* If _none_ of the atoms pairs are in cutoff range,
829 * the bit corresponding to the current
830 * cluster-pair in imask gets set to 0. */
831 if (!sycl_2020::group_any_of(sg, r2 < rlistOuterSq))
836 const float pairExclMask = (wexcl & maskJI) ? 1.0F : 0.0F;
838 // cutoff & exclusion check
840 const bool notExcluded = doExclusionForces ? (nonSelfInteraction | (ci != cj))
843 // SYCL-TODO: Check optimal way of branching here.
844 if ((r2 < rCoulombSq) && notExcluded)
846 const float qi = xqi[3];
847 int atomTypeI; // Only needed if (!props.vdwComb)
848 float sigma, epsilon;
851 if constexpr (!props.vdwComb)
853 /* LJ 6*C6 and 12*C12 */
854 atomTypeI = sm_atomTypeI[i][tidxi];
855 c6c12 = a_nbfp[numTypes * atomTypeI + atomTypeJ];
859 const Float2 ljCombI = sm_ljCombI[i][tidxi];
860 if constexpr (props.vdwCombGeom)
862 c6c12 = Float2(ljCombI[0] * ljCombJ[0], ljCombI[1] * ljCombJ[1]);
866 static_assert(props.vdwCombLB);
867 // LJ 2^(1/6)*sigma and 12*epsilon
868 sigma = ljCombI[0] + ljCombJ[0];
869 epsilon = ljCombI[1] * ljCombJ[1];
870 if constexpr (doCalcEnergies)
872 c6c12 = convertSigmaEpsilonToC6C12(sigma, epsilon);
874 } // props.vdwCombGeom
877 // c6 and c12 are unused and garbage iff props.vdwCombLB && !doCalcEnergies
878 const float c6 = c6c12[0];
879 const float c12 = c6c12[1];
881 // Ensure distance do not become so small that r^-12 overflows
882 r2 = std::max(r2, c_nbnxnMinDistanceSquared);
884 // No fast/native functions in some compilation passes
885 const float rInv = cl::sycl::rsqrt(r2);
887 // SYCL-TODO: sycl::half_precision::rsqrt?
888 const float rInv = cl::sycl::native::rsqrt(r2);
890 const float r2Inv = rInv * rInv;
891 float r6Inv, fInvR, energyLJPair;
892 if constexpr (!props.vdwCombLB || doCalcEnergies)
894 r6Inv = r2Inv * r2Inv * r2Inv;
895 if constexpr (doExclusionForces)
897 // SYCL-TODO: Check if true for SYCL
898 /* We could mask r2Inv, but with Ewald masking both
899 * r6Inv and fInvR is faster */
900 r6Inv *= pairExclMask;
902 fInvR = r6Inv * (c12 * r6Inv - c6) * r2Inv;
906 float sig_r = sigma * rInv;
907 float sig_r2 = sig_r * sig_r;
908 float sig_r6 = sig_r2 * sig_r2 * sig_r2;
909 if constexpr (doExclusionForces)
911 sig_r6 *= pairExclMask;
913 fInvR = epsilon * sig_r6 * (sig_r6 - 1.0F) * r2Inv;
914 } // (!props.vdwCombLB || doCalcEnergies)
915 if constexpr (doCalcEnergies || props.vdwPSwitch)
917 energyLJPair = pairExclMask
918 * (c12 * (r6Inv * r6Inv + repulsionShift.cpot) * c_oneTwelfth
919 - c6 * (r6Inv + dispersionShift.cpot) * c_oneSixth);
921 if constexpr (props.vdwFSwitch)
923 ljForceSwitch<doCalcEnergies>(
924 dispersionShift, repulsionShift, rVdwSwitch, c6, c12, rInv, r2, &fInvR, &energyLJPair);
926 if constexpr (props.vdwEwald)
928 ljEwaldComb<doCalcEnergies, vdwType>(a_nbfpComb,
939 } // (props.vdwEwald)
940 if constexpr (props.vdwPSwitch)
942 ljPotentialSwitch<doCalcEnergies>(
943 vdwSwitch, rVdwSwitch, rInv, r2, &fInvR, &energyLJPair);
945 if constexpr (props.elecEwaldTwin)
947 // Separate VDW cut-off check to enable twin-range cut-offs
948 // (rVdw < rCoulomb <= rList)
949 const float vdwInRange = (r2 < rVdwSq) ? 1.0F : 0.0F;
951 if constexpr (doCalcEnergies)
953 energyLJPair *= vdwInRange;
956 if constexpr (doCalcEnergies)
958 energyVdw += energyLJPair;
961 if constexpr (props.elecCutoff)
963 if constexpr (doExclusionForces)
965 fInvR += qi * qj * pairExclMask * r2Inv * rInv;
969 fInvR += qi * qj * r2Inv * rInv;
972 if constexpr (props.elecRF)
974 fInvR += qi * qj * (pairExclMask * r2Inv * rInv - twoKRf);
976 if constexpr (props.elecEwaldAna)
979 * (pairExclMask * r2Inv * rInv + pmeCorrF(beta2 * r2) * beta3);
981 if constexpr (props.elecEwaldTab)
984 * (pairExclMask * r2Inv
985 - interpolateCoulombForceR(
986 a_coulombTab, coulombTabScale, r2 * rInv))
990 if constexpr (doCalcEnergies)
992 if constexpr (props.elecCutoff)
994 energyElec += qi * qj * (pairExclMask * rInv - cRF);
996 if constexpr (props.elecRF)
999 qi * qj * (pairExclMask * rInv + 0.5f * twoKRf * r2 - cRF);
1001 if constexpr (props.elecEwald)
1005 * (rInv * (pairExclMask - cl::sycl::erf(r2 * rInv * ewaldBeta))
1006 - pairExclMask * ewaldShift);
1010 const Float3 forceIJ = rv * fInvR;
1012 /* accumulate j forces in registers */
1014 /* accumulate i forces in registers */
1015 fCiBuf[i] += forceIJ;
1016 } // (r2 < rCoulombSq) && notExcluded
1017 } // (imask & maskJI)
1018 /* shift the mask bit by 1 */
1020 } // for (int i = 0; i < c_nbnxnGpuNumClusterPerSupercluster; i++)
1021 /* reduce j forces */
1022 reduceForceJ(sm_reductionBuffer, fCjBuf, itemIdx, tidxi, tidxj, aj, a_f);
1023 } // for (int jm = 0; jm < c_nbnxnGpuJgroupSize; jm++)
1024 if constexpr (doPruneNBL)
1026 /* Update the imask with the new one which does not contain the
1027 * out of range clusters anymore. */
1028 a_plistCJ4[j4].imei[imeiIdx].imask = imask;
1030 } // for (int j4 = cij4Start; j4 < cij4End; j4 += 1)
1032 /* skip central shifts when summing shift forces */
1033 const bool doCalcShift = (calcShift && !(nbSci.shift == gmx::c_centralShiftIndex));
1035 reduceForceIAndFShift(
1036 sm_reductionBuffer, fCiBuf, doCalcShift, itemIdx, tidxi, tidxj, sci, nbSci.shift, a_f, a_fShift);
1038 if constexpr (doCalcEnergies)
1040 const float energyVdwGroup =
1041 groupReduce<subGroupSize, c_clSizeSq>(itemIdx, tidx, sm_reductionBuffer, energyVdw);
1042 const float energyElecGroup = groupReduce<subGroupSize, c_clSizeSq>(
1043 itemIdx, tidx, sm_reductionBuffer, energyElec);
1047 atomicFetchAdd(a_energyVdw, 0, energyVdwGroup);
1048 atomicFetchAdd(a_energyElec, 0, energyElecGroup);
1054 template<bool doPruneNBL, bool doCalcEnergies, enum ElecType elecType, enum VdwType vdwType, class... Args>
1055 cl::sycl::event launchNbnxmKernel(const DeviceStream& deviceStream, const int numSci, Args&&... args)
1057 using kernelNameType = NbnxmKernel<doPruneNBL, doCalcEnergies, elecType, vdwType>;
1059 /* Kernel launch config:
1060 * - The thread block dimensions match the size of i-clusters, j-clusters,
1061 * and j-cluster concurrency, in x, y, and z, respectively.
1062 * - The 1D block-grid contains as many blocks as super-clusters.
1064 const int numBlocks = numSci;
1065 const cl::sycl::range<3> blockSize{ c_clSize, c_clSize, 1 };
1066 const cl::sycl::range<3> globalSize{ numBlocks * blockSize[0], blockSize[1], blockSize[2] };
1067 const cl::sycl::nd_range<3> range{ globalSize, blockSize };
1069 cl::sycl::queue q = deviceStream.stream();
1071 cl::sycl::event e = q.submit([&](cl::sycl::handler& cgh) {
1072 auto kernel = nbnxmKernel<doPruneNBL, doCalcEnergies, elecType, vdwType>(
1073 cgh, std::forward<Args>(args)...);
1074 cgh.parallel_for<kernelNameType>(flattenNDRange(range), kernel);
1080 template<class... Args>
1081 cl::sycl::event chooseAndLaunchNbnxmKernel(bool doPruneNBL,
1082 bool doCalcEnergies,
1083 enum ElecType elecType,
1084 enum VdwType vdwType,
1087 return gmx::dispatchTemplatedFunction(
1088 [&](auto doPruneNBL_, auto doCalcEnergies_, auto elecType_, auto vdwType_) {
1089 return launchNbnxmKernel<doPruneNBL_, doCalcEnergies_, elecType_, vdwType_>(
1090 std::forward<Args>(args)...);
1098 void launchNbnxmKernel(NbnxmGpu* nb, const gmx::StepWorkload& stepWork, const InteractionLocality iloc)
1100 NBAtomDataGpu* adat = nb->atdat;
1101 NBParamGpu* nbp = nb->nbparam;
1102 gpu_plist* plist = nb->plist[iloc];
1103 const bool doPruneNBL = (plist->haveFreshList && !nb->didPrune[iloc]);
1104 const DeviceStream& deviceStream = *nb->deviceStreams[iloc];
1106 // Casting to float simplifies using atomic ops in the kernel
1107 cl::sycl::buffer<Float3, 1> f(*adat->f.buffer_);
1108 auto fAsFloat = f.reinterpret<float, 1>(f.get_count() * DIM);
1109 cl::sycl::buffer<Float3, 1> fShift(*adat->fShift.buffer_);
1110 auto fShiftAsFloat = fShift.reinterpret<float, 1>(fShift.get_count() * DIM);
1112 cl::sycl::event e = chooseAndLaunchNbnxmKernel(doPruneNBL,
1113 stepWork.computeEnergy,
1142 nbp->dispersion_shift,
1143 nbp->repulsion_shift,
1147 nbp->coulomb_tab_scale,
1148 stepWork.computeVirial);
1151 } // namespace Nbnxm