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38 * Utility constant and function declaration for the CUDA non-bonded kernels.
39 * This header should be included once at the top level, just before the
40 * kernels are included (has to be preceded by nbnxn_cuda_types.h).
42 * \author Szilárd Páll <pall.szilard@gmail.com>
43 * \ingroup module_nbnxm
47 /* Note that floating-point constants in CUDA code should be suffixed
48 * with f (e.g. 0.5f), to stop the compiler producing intermediate
49 * code that is in double precision.
52 #include "gromacs/gpu_utils/cuda_arch_utils.cuh"
53 #include "gromacs/gpu_utils/cuda_kernel_utils.cuh"
54 #include "gromacs/gpu_utils/vectype_ops.cuh"
56 #include "nbnxm_cuda_types.h"
58 #ifndef NBNXM_CUDA_KERNEL_UTILS_CUH
59 # define NBNXM_CUDA_KERNEL_UTILS_CUH
61 /*! \brief Log of the i and j cluster size.
62 * change this together with c_clSize !*/
63 static const int __device__ c_clSizeLog2 = 3;
64 /*! \brief Square of cluster size. */
65 static const int __device__ c_clSizeSq = c_clSize * c_clSize;
66 /*! \brief j-cluster size after split (4 in the current implementation). */
67 static const int __device__ c_splitClSize = c_clSize / c_nbnxnGpuClusterpairSplit;
68 /*! \brief Stride in the force accumualation buffer */
69 static const int __device__ c_fbufStride = c_clSizeSq;
70 /*! \brief i-cluster interaction mask for a super-cluster with all c_numClPerSupercl=8 bits set */
71 static const unsigned __device__ superClInteractionMask = ((1U << c_numClPerSupercl) - 1U);
73 static const float __device__ c_oneSixth = 0.16666667f;
74 static const float __device__ c_oneTwelveth = 0.08333333f;
77 /*! Convert LJ sigma,epsilon parameters to C6,C12. */
78 static __forceinline__ __device__ void
79 convert_sigma_epsilon_to_c6_c12(const float sigma, const float epsilon, float* c6, float* c12)
83 sigma2 = sigma * sigma;
84 sigma6 = sigma2 * sigma2 * sigma2;
85 *c6 = epsilon * sigma6;
89 /*! Apply force switch, force + energy version. */
90 static __forceinline__ __device__ void
91 calculate_force_switch_F(const cu_nbparam_t nbparam, float c6, float c12, float inv_r, float r2, float* F_invr)
95 /* force switch constants */
96 float disp_shift_V2 = nbparam.dispersion_shift.c2;
97 float disp_shift_V3 = nbparam.dispersion_shift.c3;
98 float repu_shift_V2 = nbparam.repulsion_shift.c2;
99 float repu_shift_V3 = nbparam.repulsion_shift.c3;
102 r_switch = r - nbparam.rvdw_switch;
103 r_switch = r_switch >= 0.0f ? r_switch : 0.0f;
105 *F_invr += -c6 * (disp_shift_V2 + disp_shift_V3 * r_switch) * r_switch * r_switch * inv_r
106 + c12 * (repu_shift_V2 + repu_shift_V3 * r_switch) * r_switch * r_switch * inv_r;
109 /*! Apply force switch, force-only version. */
110 static __forceinline__ __device__ void calculate_force_switch_F_E(const cu_nbparam_t nbparam,
120 /* force switch constants */
121 float disp_shift_V2 = nbparam.dispersion_shift.c2;
122 float disp_shift_V3 = nbparam.dispersion_shift.c3;
123 float repu_shift_V2 = nbparam.repulsion_shift.c2;
124 float repu_shift_V3 = nbparam.repulsion_shift.c3;
126 float disp_shift_F2 = nbparam.dispersion_shift.c2 / 3;
127 float disp_shift_F3 = nbparam.dispersion_shift.c3 / 4;
128 float repu_shift_F2 = nbparam.repulsion_shift.c2 / 3;
129 float repu_shift_F3 = nbparam.repulsion_shift.c3 / 4;
132 r_switch = r - nbparam.rvdw_switch;
133 r_switch = r_switch >= 0.0f ? r_switch : 0.0f;
135 *F_invr += -c6 * (disp_shift_V2 + disp_shift_V3 * r_switch) * r_switch * r_switch * inv_r
136 + c12 * (repu_shift_V2 + repu_shift_V3 * r_switch) * r_switch * r_switch * inv_r;
137 *E_lj += c6 * (disp_shift_F2 + disp_shift_F3 * r_switch) * r_switch * r_switch * r_switch
138 - c12 * (repu_shift_F2 + repu_shift_F3 * r_switch) * r_switch * r_switch * r_switch;
141 /*! Apply potential switch, force-only version. */
142 static __forceinline__ __device__ void
143 calculate_potential_switch_F(const cu_nbparam_t nbparam, float inv_r, float r2, float* F_invr, float* E_lj)
148 /* potential switch constants */
149 float switch_V3 = nbparam.vdw_switch.c3;
150 float switch_V4 = nbparam.vdw_switch.c4;
151 float switch_V5 = nbparam.vdw_switch.c5;
152 float switch_F2 = 3 * nbparam.vdw_switch.c3;
153 float switch_F3 = 4 * nbparam.vdw_switch.c4;
154 float switch_F4 = 5 * nbparam.vdw_switch.c5;
157 r_switch = r - nbparam.rvdw_switch;
159 /* Unlike in the F+E kernel, conditional is faster here */
162 sw = 1.0f + (switch_V3 + (switch_V4 + switch_V5 * r_switch) * r_switch) * r_switch * r_switch * r_switch;
163 dsw = (switch_F2 + (switch_F3 + switch_F4 * r_switch) * r_switch) * r_switch * r_switch;
165 *F_invr = (*F_invr) * sw - inv_r * (*E_lj) * dsw;
169 /*! Apply potential switch, force + energy version. */
170 static __forceinline__ __device__ void
171 calculate_potential_switch_F_E(const cu_nbparam_t nbparam, float inv_r, float r2, float* F_invr, float* E_lj)
176 /* potential switch constants */
177 float switch_V3 = nbparam.vdw_switch.c3;
178 float switch_V4 = nbparam.vdw_switch.c4;
179 float switch_V5 = nbparam.vdw_switch.c5;
180 float switch_F2 = 3 * nbparam.vdw_switch.c3;
181 float switch_F3 = 4 * nbparam.vdw_switch.c4;
182 float switch_F4 = 5 * nbparam.vdw_switch.c5;
185 r_switch = r - nbparam.rvdw_switch;
186 r_switch = r_switch >= 0.0f ? r_switch : 0.0f;
188 /* Unlike in the F-only kernel, masking is faster here */
189 sw = 1.0f + (switch_V3 + (switch_V4 + switch_V5 * r_switch) * r_switch) * r_switch * r_switch * r_switch;
190 dsw = (switch_F2 + (switch_F3 + switch_F4 * r_switch) * r_switch) * r_switch * r_switch;
192 *F_invr = (*F_invr) * sw - inv_r * (*E_lj) * dsw;
197 /*! \brief Fetch C6 grid contribution coefficients and return the product of these.
199 * Depending on what is supported, it fetches parameters either
200 * using direct load, texture objects, or texrefs.
202 static __forceinline__ __device__ float calculate_lj_ewald_c6grid(const cu_nbparam_t nbparam, int typei, int typej)
204 # if DISABLE_CUDA_TEXTURES
205 return LDG(&nbparam.nbfp_comb[2 * typei]) * LDG(&nbparam.nbfp_comb[2 * typej]);
207 return tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2 * typei)
208 * tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2 * typej);
209 # endif /* DISABLE_CUDA_TEXTURES */
213 /*! Calculate LJ-PME grid force contribution with
214 * geometric combination rule.
216 static __forceinline__ __device__ void calculate_lj_ewald_comb_geom_F(const cu_nbparam_t nbparam,
225 float c6grid, inv_r6_nm, cr2, expmcr2, poly;
227 c6grid = calculate_lj_ewald_c6grid(nbparam, typei, typej);
229 /* Recalculate inv_r6 without exclusion mask */
230 inv_r6_nm = inv_r2 * inv_r2 * inv_r2;
231 cr2 = lje_coeff2 * r2;
232 expmcr2 = expf(-cr2);
233 poly = 1.0f + cr2 + 0.5f * cr2 * cr2;
235 /* Subtract the grid force from the total LJ force */
236 *F_invr += c6grid * (inv_r6_nm - expmcr2 * (inv_r6_nm * poly + lje_coeff6_6)) * inv_r2;
240 /*! Calculate LJ-PME grid force + energy contribution with
241 * geometric combination rule.
243 static __forceinline__ __device__ void calculate_lj_ewald_comb_geom_F_E(const cu_nbparam_t nbparam,
254 float c6grid, inv_r6_nm, cr2, expmcr2, poly, sh_mask;
256 c6grid = calculate_lj_ewald_c6grid(nbparam, typei, typej);
258 /* Recalculate inv_r6 without exclusion mask */
259 inv_r6_nm = inv_r2 * inv_r2 * inv_r2;
260 cr2 = lje_coeff2 * r2;
261 expmcr2 = expf(-cr2);
262 poly = 1.0f + cr2 + 0.5f * cr2 * cr2;
264 /* Subtract the grid force from the total LJ force */
265 *F_invr += c6grid * (inv_r6_nm - expmcr2 * (inv_r6_nm * poly + lje_coeff6_6)) * inv_r2;
267 /* Shift should be applied only to real LJ pairs */
268 sh_mask = nbparam.sh_lj_ewald * int_bit;
269 *E_lj += c_oneSixth * c6grid * (inv_r6_nm * (1.0f - expmcr2 * poly) + sh_mask);
272 /*! Fetch per-type LJ parameters.
274 * Depending on what is supported, it fetches parameters either
275 * using direct load, texture objects, or texrefs.
277 static __forceinline__ __device__ float2 fetch_nbfp_comb_c6_c12(const cu_nbparam_t nbparam, int type)
280 # if DISABLE_CUDA_TEXTURES
281 /* Force an 8-byte fetch to save a memory instruction. */
282 float2* nbfp_comb = (float2*)nbparam.nbfp_comb;
283 c6c12 = LDG(&nbfp_comb[type]);
285 /* NOTE: as we always do 8-byte aligned loads, we could
286 fetch float2 here too just as above. */
287 c6c12.x = tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2 * type);
288 c6c12.y = tex1Dfetch<float>(nbparam.nbfp_comb_texobj, 2 * type + 1);
289 # endif /* DISABLE_CUDA_TEXTURES */
295 /*! Calculate LJ-PME grid force + energy contribution (if E_lj != nullptr) with
296 * Lorentz-Berthelot combination rule.
297 * We use a single F+E kernel with conditional because the performance impact
298 * of this is pretty small and LB on the CPU is anyway very slow.
300 static __forceinline__ __device__ void calculate_lj_ewald_comb_LB_F_E(const cu_nbparam_t nbparam,
311 float c6grid, inv_r6_nm, cr2, expmcr2, poly;
312 float sigma, sigma2, epsilon;
314 /* sigma and epsilon are scaled to give 6*C6 */
315 float2 c6c12_i = fetch_nbfp_comb_c6_c12(nbparam, typei);
316 float2 c6c12_j = fetch_nbfp_comb_c6_c12(nbparam, typej);
318 sigma = c6c12_i.x + c6c12_j.x;
319 epsilon = c6c12_i.y * c6c12_j.y;
321 sigma2 = sigma * sigma;
322 c6grid = epsilon * sigma2 * sigma2 * sigma2;
324 /* Recalculate inv_r6 without exclusion mask */
325 inv_r6_nm = inv_r2 * inv_r2 * inv_r2;
326 cr2 = lje_coeff2 * r2;
327 expmcr2 = expf(-cr2);
328 poly = 1.0f + cr2 + 0.5f * cr2 * cr2;
330 /* Subtract the grid force from the total LJ force */
331 *F_invr += c6grid * (inv_r6_nm - expmcr2 * (inv_r6_nm * poly + lje_coeff6_6)) * inv_r2;
337 /* Shift should be applied only to real LJ pairs */
338 sh_mask = nbparam.sh_lj_ewald * int_bit;
339 *E_lj += c_oneSixth * c6grid * (inv_r6_nm * (1.0f - expmcr2 * poly) + sh_mask);
344 /*! Fetch two consecutive values from the Ewald correction F*r table.
346 * Depending on what is supported, it fetches parameters either
347 * using direct load, texture objects, or texrefs.
349 static __forceinline__ __device__ float2 fetch_coulomb_force_r(const cu_nbparam_t nbparam, int index)
353 # if DISABLE_CUDA_TEXTURES
354 /* Can't do 8-byte fetch because some of the addresses will be misaligned. */
355 d.x = LDG(&nbparam.coulomb_tab[index]);
356 d.y = LDG(&nbparam.coulomb_tab[index + 1]);
358 d.x = tex1Dfetch<float>(nbparam.coulomb_tab_texobj, index);
359 d.y = tex1Dfetch<float>(nbparam.coulomb_tab_texobj, index + 1);
360 # endif // DISABLE_CUDA_TEXTURES
365 /*! Linear interpolation using exactly two FMA operations.
367 * Implements numeric equivalent of: (1-t)*d0 + t*d1
368 * Note that CUDA does not have fnms, otherwise we'd use
369 * fma(t, d1, fnms(t, d0, d0)
370 * but input modifiers are designed for this and are fast.
373 __forceinline__ __host__ __device__ T lerp(T d0, T d1, T t)
375 return fma(t, d1, fma(-t, d0, d0));
378 /*! Interpolate Ewald coulomb force correction using the F*r table.
380 static __forceinline__ __device__ float interpolate_coulomb_force_r(const cu_nbparam_t nbparam, float r)
382 float normalized = nbparam.coulomb_tab_scale * r;
383 int index = (int)normalized;
384 float fraction = normalized - index;
386 float2 d01 = fetch_coulomb_force_r(nbparam, index);
388 return lerp(d01.x, d01.y, fraction);
391 /*! Fetch C6 and C12 from the parameter table.
393 * Depending on what is supported, it fetches parameters either
394 * using direct load, texture objects, or texrefs.
396 static __forceinline__ __device__ void fetch_nbfp_c6_c12(float& c6, float& c12, const cu_nbparam_t nbparam, int baseIndex)
398 # if DISABLE_CUDA_TEXTURES
399 /* Force an 8-byte fetch to save a memory instruction. */
400 float2* nbfp = (float2*)nbparam.nbfp;
402 c6c12 = LDG(&nbfp[baseIndex]);
406 /* NOTE: as we always do 8-byte aligned loads, we could
407 fetch float2 here too just as above. */
408 c6 = tex1Dfetch<float>(nbparam.nbfp_texobj, 2 * baseIndex);
409 c12 = tex1Dfetch<float>(nbparam.nbfp_texobj, 2 * baseIndex + 1);
410 # endif // DISABLE_CUDA_TEXTURES
414 /*! Calculate analytical Ewald correction term. */
415 static __forceinline__ __device__ float pmecorrF(float z2)
417 const float FN6 = -1.7357322914161492954e-8f;
418 const float FN5 = 1.4703624142580877519e-6f;
419 const float FN4 = -0.000053401640219807709149f;
420 const float FN3 = 0.0010054721316683106153f;
421 const float FN2 = -0.019278317264888380590f;
422 const float FN1 = 0.069670166153766424023f;
423 const float FN0 = -0.75225204789749321333f;
425 const float FD4 = 0.0011193462567257629232f;
426 const float FD3 = 0.014866955030185295499f;
427 const float FD2 = 0.11583842382862377919f;
428 const float FD1 = 0.50736591960530292870f;
429 const float FD0 = 1.0f;
432 float polyFN0, polyFN1, polyFD0, polyFD1;
436 polyFD0 = FD4 * z4 + FD2;
437 polyFD1 = FD3 * z4 + FD1;
438 polyFD0 = polyFD0 * z4 + FD0;
439 polyFD0 = polyFD1 * z2 + polyFD0;
441 polyFD0 = 1.0f / polyFD0;
443 polyFN0 = FN6 * z4 + FN4;
444 polyFN1 = FN5 * z4 + FN3;
445 polyFN0 = polyFN0 * z4 + FN2;
446 polyFN1 = polyFN1 * z4 + FN1;
447 polyFN0 = polyFN0 * z4 + FN0;
448 polyFN0 = polyFN1 * z2 + polyFN0;
450 return polyFN0 * polyFD0;
453 /*! Final j-force reduction; this generic implementation works with
454 * arbitrary array sizes.
456 static __forceinline__ __device__ void
457 reduce_force_j_generic(float* f_buf, float3* fout, int tidxi, int tidxj, int aidx)
462 for (int j = tidxj * c_clSize; j < (tidxj + 1) * c_clSize; j++)
464 f += f_buf[c_fbufStride * tidxi + j];
467 atomicAdd((&fout[aidx].x) + tidxi, f);
471 /*! Final j-force reduction; this implementation only with power of two
474 static __forceinline__ __device__ void
475 reduce_force_j_warp_shfl(float3 f, float3* fout, int tidxi, int aidx, const unsigned int activemask)
477 f.x += __shfl_down_sync(activemask, f.x, 1);
478 f.y += __shfl_up_sync(activemask, f.y, 1);
479 f.z += __shfl_down_sync(activemask, f.z, 1);
486 f.x += __shfl_down_sync(activemask, f.x, 2);
487 f.z += __shfl_up_sync(activemask, f.z, 2);
494 f.x += __shfl_down_sync(activemask, f.x, 4);
498 atomicAdd((&fout[aidx].x) + tidxi, f.x);
502 /*! Final i-force reduction; this generic implementation works with
503 * arbitrary array sizes.
504 * TODO: add the tidxi < 3 trick
506 static __forceinline__ __device__ void reduce_force_i_generic(float* f_buf,
517 for (int j = tidxi; j < c_clSizeSq; j += c_clSize)
519 f += f_buf[tidxj * c_fbufStride + j];
522 atomicAdd(&fout[aidx].x + tidxj, f);
531 /*! Final i-force reduction; this implementation works only with power of two
534 static __forceinline__ __device__ void reduce_force_i_pow2(volatile float* f_buf,
545 assert(c_clSize == 1 << c_clSizeLog2);
547 /* Reduce the initial c_clSize values for each i atom to half
548 * every step by using c_clSize * i threads.
549 * Can't just use i as loop variable because than nvcc refuses to unroll.
553 for (j = c_clSizeLog2 - 1; j > 0; j--)
558 f_buf[tidxj * c_clSize + tidxi] += f_buf[(tidxj + i) * c_clSize + tidxi];
559 f_buf[c_fbufStride + tidxj * c_clSize + tidxi] +=
560 f_buf[c_fbufStride + (tidxj + i) * c_clSize + tidxi];
561 f_buf[2 * c_fbufStride + tidxj * c_clSize + tidxi] +=
562 f_buf[2 * c_fbufStride + (tidxj + i) * c_clSize + tidxi];
567 /* i == 1, last reduction step, writing to global mem */
570 /* tidxj*c_fbufStride selects x, y or z */
571 f = f_buf[tidxj * c_fbufStride + tidxi] + f_buf[tidxj * c_fbufStride + i * c_clSize + tidxi];
573 atomicAdd(&(fout[aidx].x) + tidxj, f);
582 /*! Final i-force reduction wrapper; calls the generic or pow2 reduction depending
583 * on whether the size of the array to be reduced is power of two or not.
585 static __forceinline__ __device__ void
586 reduce_force_i(float* f_buf, float3* f, float* fshift_buf, bool bCalcFshift, int tidxi, int tidxj, int ai)
588 if ((c_clSize & (c_clSize - 1)))
590 reduce_force_i_generic(f_buf, f, fshift_buf, bCalcFshift, tidxi, tidxj, ai);
594 reduce_force_i_pow2(f_buf, f, fshift_buf, bCalcFshift, tidxi, tidxj, ai);
598 /*! Final i-force reduction; this implementation works only with power of two
601 static __forceinline__ __device__ void reduce_force_i_warp_shfl(float3 fin,
607 const unsigned int activemask)
609 fin.x += __shfl_down_sync(activemask, fin.x, c_clSize);
610 fin.y += __shfl_up_sync(activemask, fin.y, c_clSize);
611 fin.z += __shfl_down_sync(activemask, fin.z, c_clSize);
618 fin.x += __shfl_down_sync(activemask, fin.x, 2 * c_clSize);
619 fin.z += __shfl_up_sync(activemask, fin.z, 2 * c_clSize);
626 /* Threads 0,1,2 and 4,5,6 increment x,y,z for their warp */
629 atomicAdd(&fout[aidx].x + (tidxj & 3), fin.x);
633 *fshift_buf += fin.x;
638 /*! Energy reduction; this implementation works only with power of two
641 static __forceinline__ __device__ void
642 reduce_energy_pow2(volatile float* buf, float* e_lj, float* e_el, unsigned int tidx)
646 unsigned int i = warp_size / 2;
648 /* Can't just use i as loop variable because than nvcc refuses to unroll. */
650 for (int j = warp_size_log2 - 1; j > 0; j--)
654 buf[tidx] += buf[tidx + i];
655 buf[c_fbufStride + tidx] += buf[c_fbufStride + tidx + i];
660 // TODO do this on two threads - requires e_lj and e_el to be stored on adjascent
661 // memory locations to make sense
662 /* last reduction step, writing to global mem */
665 e1 = buf[tidx] + buf[tidx + i];
666 e2 = buf[c_fbufStride + tidx] + buf[c_fbufStride + tidx + i];
673 /*! Energy reduction; this implementation works only with power of two
676 static __forceinline__ __device__ void
677 reduce_energy_warp_shfl(float E_lj, float E_el, float* e_lj, float* e_el, int tidx, const unsigned int activemask)
683 for (i = 0; i < 5; i++)
685 E_lj += __shfl_down_sync(activemask, E_lj, sh);
686 E_el += __shfl_down_sync(activemask, E_el, sh);
690 /* The first thread in the warp writes the reduced energies */
691 if (tidx == 0 || tidx == warp_size)
693 atomicAdd(e_lj, E_lj);
694 atomicAdd(e_el, E_el);
698 #endif /* NBNXN_CUDA_KERNEL_UTILS_CUH */