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35 #ifndef _nbnxn_kernel_simd_utils_h_
36 #define _nbnxn_kernel_simd_utils_h_
38 #include "gromacs/legacyheaders/types/simple.h"
40 /*! \brief Provides hardware-specific utility routines for the SIMD kernels.
42 * Defines all functions, typedefs, constants and macros that have
43 * explicit dependencies on the j-cluster size, precision, or SIMD
44 * width. This includes handling diagonal, Newton and topology
47 * The functionality which depends on the j-cluster size is:
50 * energy group pair energy storage
53 #if !defined GMX_NBNXN_SIMD_2XNN && !defined GMX_NBNXN_SIMD_4XN
54 #error "Must define an NBNxN kernel flavour before including NBNxN kernel utility functions"
57 #ifdef GMX_SIMD_REFERENCE
59 /* Align a stack-based thread-local working array. */
60 static gmx_inline int *
61 prepare_table_load_buffer(const int gmx_unused *array)
66 #include "nbnxn_kernel_simd_utils_ref.h"
68 #else /* GMX_SIMD_REFERENCE */
70 #if defined GMX_TARGET_X86 && !defined __MIC__
71 /* Include x86 SSE2 compatible SIMD functions */
73 /* Set the stride for the lookup of the two LJ parameters from their
74 * (padded) array. We use the minimum supported SIMD memory alignment.
76 #if defined GMX_DOUBLE
77 static const int nbfp_stride = 2;
79 static const int nbfp_stride = 4;
82 /* Align a stack-based thread-local working array. Table loads on
83 * 256-bit AVX use the array, but other implementations do not.
85 static gmx_inline int *
86 prepare_table_load_buffer(int gmx_unused *array)
88 #if GMX_SIMD_REAL_WIDTH >= 8 || (defined GMX_DOUBLE && GMX_SIMD_REAL_WIDTH >= 4)
89 return gmx_simd_align_i(array);
96 #if GMX_SIMD_REAL_WIDTH == 2
97 #include "nbnxn_kernel_simd_utils_x86_128d.h"
99 #include "nbnxn_kernel_simd_utils_x86_256d.h"
101 #else /* GMX_DOUBLE */
102 /* In single precision aligned FDV0 table loads are optimal */
104 #if GMX_SIMD_REAL_WIDTH == 4
105 #include "nbnxn_kernel_simd_utils_x86_128s.h"
107 #include "nbnxn_kernel_simd_utils_x86_256s.h"
109 #endif /* GMX_DOUBLE */
111 #else /* GMX_TARGET_X86 && !__MIC__ */
113 #if GMX_SIMD_REAL_WIDTH > 4
114 /* For width>4 we use unaligned loads. And thus we can use the minimal stride */
115 static const int nbfp_stride = 2;
117 static const int nbfp_stride = GMX_SIMD_REAL_WIDTH;
120 /* We use the FDV0 table layout when we can use aligned table loads */
121 #if GMX_SIMD_REAL_WIDTH == 4
125 #ifdef GMX_SIMD_IBM_QPX
126 #include "nbnxn_kernel_simd_utils_ibm_qpx.h"
127 #endif /* GMX_SIMD_IBM_QPX */
130 #include "nbnxn_kernel_simd_utils_x86_mic.h"
133 #endif /* GMX_TARGET_X86 && !__MIC__ */
135 #endif /* GMX_SIMD_REFERENCE */
137 /* If the simd width is 4, but simd4 instructions are not defined,
138 * reuse the simd real type and the four instructions we need.
140 #if GMX_SIMD_REAL_WIDTH == 4 && \
141 !((!defined GMX_DOUBLE && defined GMX_SIMD4_HAVE_FLOAT) || \
142 (defined GMX_DOUBLE && defined GMX_SIMD4_HAVE_DOUBLE))
143 #define gmx_simd4_real_t gmx_simd_real_t
144 #define gmx_simd4_load_r gmx_simd_load_r
145 #define gmx_simd4_store_r gmx_simd_store_r
146 #define gmx_simd4_add_r gmx_simd_add_r
147 #define gmx_simd4_reduce_r gmx_simd_reduce_r
151 /* Add energy register to possibly multiple terms in the energy array */
152 static gmx_inline void add_ener_grp(gmx_simd_real_t e_S, real *v, const int *offset_jj)
156 /* We need to balance the number of store operations with
157 * the rapidly increases number of combinations of energy groups.
158 * We add to a temporary buffer for 1 i-group vs 2 j-groups.
160 for (jj = 0; jj < (UNROLLJ/2); jj++)
164 v_S = gmx_simd_load_r(v+offset_jj[jj]+jj*GMX_SIMD_REAL_WIDTH);
165 gmx_simd_store_r(v+offset_jj[jj]+jj*GMX_SIMD_REAL_WIDTH, gmx_simd_add_r(v_S, e_S));
170 #if defined GMX_NBNXN_SIMD_2XNN && defined UNROLLJ
171 /* As add_ener_grp, but for two groups of UNROLLJ/2 stored in
172 * a single SIMD register.
174 static gmx_inline void
175 add_ener_grp_halves(gmx_simd_real_t e_S, real *v0, real *v1, const int *offset_jj)
177 gmx_mm_hpr e_S0, e_S1;
180 gmx_pr_to_2hpr(e_S, &e_S0, &e_S1);
182 for (jj = 0; jj < (UNROLLJ/2); jj++)
186 gmx_load_hpr(&v_S, v0+offset_jj[jj]+jj*GMX_SIMD_REAL_WIDTH/2);
187 gmx_store_hpr(v0+offset_jj[jj]+jj*GMX_SIMD_REAL_WIDTH/2, gmx_add_hpr(v_S, e_S0));
189 for (jj = 0; jj < (UNROLLJ/2); jj++)
193 gmx_load_hpr(&v_S, v1+offset_jj[jj]+jj*GMX_SIMD_REAL_WIDTH/2);
194 gmx_store_hpr(v1+offset_jj[jj]+jj*GMX_SIMD_REAL_WIDTH/2, gmx_add_hpr(v_S, e_S1));
199 #endif /* _nbnxn_kernel_simd_utils_h_ */