2 * define HAVE_RDTSCP to use the serializing rdtscp instruction instead of rdtsc.
3 * This is only supported on newer Intel/AMD hardware, but provides better accuracy.
6 /* check for cycle counters on supported platforms */
7 #if ((defined(__GNUC__) || defined(__INTEL_COMPILER) || defined(__PATHSCALE__) || defined(__PGIC__)) && (defined(__i386__) || defined(__x86_64__)))
8 #define TMPI_CYCLE_COUNT
9 /* x86 or x86-64 with GCC inline assembly */
10 typedef unsigned long long tMPI_Cycles_t;
12 static __inline__ tMPI_Cycles_t tMPI_Cycles_read(void)
14 /* x86 with GCC inline assembly - pentium TSC register */
19 __asm__ __volatile__("rdtscp" : "=a" (low), "=d" (high) :: "ecx" );
21 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
24 cycle = ((unsigned long long)low) | (((unsigned long long)high)<<32);
28 #elif (defined(__INTEL_COMPILER) && defined(__ia64__))
29 #define TMPI_CYCLE_COUNT
30 typedef unsigned long tMPI_Cycles_t;
31 static __inline__ tMPI_Cycles_t tMPI_Cycles_read(void)
33 /* Intel compiler on ia64 */
34 return __getReg(_IA64_REG_AR_ITC);
36 #elif defined(__GNUC__) && defined(__ia64__)
37 #define TMPI_CYCLE_COUNT
38 typedef unsigned long tMPI_Cycles_t;
39 static __inline__ tMPI_Cycles_t tMPI_Cycles_read(void)
41 /* ia64 with GCC inline assembly */
43 __asm__ __volatile__ ("mov %0=ar.itc" : "=r" (ret));
46 #elif defined(_MSC_VER)
47 #define TMPI_CYCLE_COUNT
48 typedef __int64 tMPI_Cycles_t;
49 static __inline tMPI_Cycles_t tMPI_Cycles_read(void)