1 /* -*- mode: c; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4; c-file-style: "stroustrup"; -*-
4 * This file is part of GROMACS.
7 * Written by the Gromacs development team under coordination of
8 * David van der Spoel, Berk Hess, and Erik Lindahl.
10 * This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
15 * To help us fund GROMACS development, we humbly ask that you cite
16 * the research papers on the package. Check out http://www.gromacs.org
19 * Gnomes, ROck Monsters And Chili Sauce
31 } /* fixes auto-indentation problems */
35 /* Currently identifiable CPU Vendors */
38 GMX_CPUID_VENDOR_CANNOTDETECT, /* Should only be used if something fails */
39 GMX_CPUID_VENDOR_UNKNOWN,
40 GMX_CPUID_VENDOR_INTEL,
42 GMX_CPUID_VENDOR_FUJITSU,
48 /* CPU feature/property list, to be used as indices into the feature array of the
49 * gmxcpuid_t data structure.
51 * To facilitate looking things up, we keep this list alphabetical.
52 * The list is NOT exhaustive - we have basically added stuff that might be
53 * useful in an application like Gromacs.
55 * AMD and Intel tend to share most architectural elements, and even if the
56 * flags might have to be detected in different ways (different cpuid registers),
57 * once the flag is present the functions should be identical. Unfortunately the
58 * trend right now (2012) seems to be that they are diverging. This means that
59 * we need to use specific flags to the compiler to maximize performance, and
60 * then the binaries might not be portable between Intel and AMD as they were
61 * before when we only needed to check for SSE and/or SSE2 support in Gromacs.
63 enum gmx_cpuid_feature
65 GMX_CPUID_FEATURE_CANNOTDETECT, /* Flag set if we could not detect on this CPU */
66 GMX_CPUID_FEATURE_X86_AES, /* x86 advanced encryption standard accel. */
67 GMX_CPUID_FEATURE_X86_APIC, /* APIC support */
68 GMX_CPUID_FEATURE_X86_AVX, /* Advanced vector extensions */
69 GMX_CPUID_FEATURE_X86_AVX2, /* AVX2 including gather support (not used yet) */
70 GMX_CPUID_FEATURE_X86_CLFSH, /* Supports CLFLUSH instruction */
71 GMX_CPUID_FEATURE_X86_CMOV, /* Conditional move insn support */
72 GMX_CPUID_FEATURE_X86_CX8, /* Supports CMPXCHG8B (8-byte compare-exchange) */
73 GMX_CPUID_FEATURE_X86_CX16, /* Supports CMPXCHG16B (16-byte compare-exchg) */
74 GMX_CPUID_FEATURE_X86_F16C, /* Supports 16-bit FP conversion instructions */
75 GMX_CPUID_FEATURE_X86_FMA, /* Fused-multiply add support (mainly for AVX) */
76 GMX_CPUID_FEATURE_X86_FMA4, /* 4-operand FMA, only on AMD for now */
77 GMX_CPUID_FEATURE_X86_HTT, /* Hyper-Threading supported */
78 GMX_CPUID_FEATURE_X86_LAHF_LM, /* LAHF/SAHF support in 64 bits */
79 GMX_CPUID_FEATURE_X86_MISALIGNSSE, /* Support for misaligned SSE data instructions */
80 GMX_CPUID_FEATURE_X86_MMX, /* MMX registers and instructions */
81 GMX_CPUID_FEATURE_X86_MSR, /* Supports Intel model-specific-registers */
82 GMX_CPUID_FEATURE_X86_NONSTOP_TSC, /* Invariant TSC (constant rate in ACPI states) */
83 GMX_CPUID_FEATURE_X86_PCID, /* Process context identifier support */
84 GMX_CPUID_FEATURE_X86_PCLMULDQ, /* Carry-less 64-bit multiplication supported */
85 GMX_CPUID_FEATURE_X86_PDCM, /* Perfmon and Debug Capability */
86 GMX_CPUID_FEATURE_X86_PDPE1GB, /* Support for 1GB pages */
87 GMX_CPUID_FEATURE_X86_POPCNT, /* Supports the POPCNT (population count) insn */
88 GMX_CPUID_FEATURE_X86_PSE, /* Supports 4MB-pages (page size extension) */
89 GMX_CPUID_FEATURE_X86_RDRND, /* RDRAND high-quality hardware random numbers */
90 GMX_CPUID_FEATURE_X86_RDTSCP, /* Serializing rdtscp instruction available */
91 GMX_CPUID_FEATURE_X86_SSE2, /* SSE 2 */
92 GMX_CPUID_FEATURE_X86_SSE3, /* SSE 3 */
93 GMX_CPUID_FEATURE_X86_SSE4A, /* SSE 4A */
94 GMX_CPUID_FEATURE_X86_SSE4_1, /* SSE 4.1 */
95 GMX_CPUID_FEATURE_X86_SSE4_2, /* SSE 4.2 */
96 GMX_CPUID_FEATURE_X86_SSSE3, /* Supplemental SSE3 */
97 GMX_CPUID_FEATURE_X86_TDT, /* TSC deadline timer */
98 GMX_CPUID_FEATURE_X86_X2APIC, /* Extended xAPIC Support */
99 GMX_CPUID_FEATURE_X86_XOP, /* AMD extended instructions, only AMD for now */
104 /* Currently supported acceleration instruction sets, intrinsics or other similar combinations
105 * in Gromacs. There is not always a 1-to-1 correspondence with feature flags; on some AMD
106 * hardware we prefer to use 128bit AVX instructions (although 256-bit ones could be executed),
107 * and we still haven't written the AVX2 kernels.
109 enum gmx_cpuid_acceleration
111 GMX_CPUID_ACCELERATION_CANNOTDETECT, /* Should only be used if something fails */
112 GMX_CPUID_ACCELERATION_NONE,
113 GMX_CPUID_ACCELERATION_X86_SSE2,
114 GMX_CPUID_ACCELERATION_X86_SSE4_1,
115 GMX_CPUID_ACCELERATION_X86_AVX_128_FMA,
116 GMX_CPUID_ACCELERATION_X86_AVX_256,
117 GMX_CPUID_ACCELERATION_SPARC64_HPC_ACE,
118 GMX_CPUID_ACCELERATION_IBM_QPX,
119 GMX_CPUID_NACCELERATIONS
122 /* Text strings corresponding to CPU vendors */
124 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS];
126 /* Text strings for CPU feature indices */
128 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES];
130 /* Text strings for Gromacs acceleration/instruction sets */
132 gmx_cpuid_acceleration_string[GMX_CPUID_NACCELERATIONS];
135 /* Abstract data type with CPU detection information. Set by gmx_cpuid_init(). */
136 typedef struct gmx_cpuid *
140 /* Fill the data structure by using CPU detection instructions.
141 * Return 0 on success, 1 if something bad happened.
144 gmx_cpuid_init (gmx_cpuid_t * cpuid);
147 /* Return the vendor id as enumerated type. Use gmx_cpuid_vendor_string[]
148 * to get the corresponding text string.
150 enum gmx_cpuid_vendor
151 gmx_cpuid_vendor (gmx_cpuid_t cpuid);
154 /* Return a constant pointer to the processor brand string. */
156 gmx_cpuid_brand (gmx_cpuid_t cpuid);
159 /* Return processor family version. For a chip of version 1.2.3, this is 1 */
161 gmx_cpuid_family (gmx_cpuid_t cpuid);
163 /* Return processor model version, For a chip of version 1.2.3, this is 2. */
165 gmx_cpuid_model (gmx_cpuid_t cpuid);
167 /* Return processor stepping version, For a chip of version 1.2.3, this is 3. */
169 gmx_cpuid_stepping (gmx_cpuid_t cpuid);
172 /* Check whether a particular CPUID feature is set.
173 * Returns 0 if flag "feature" is not set, 1 if the flag is set. We cannot use
174 * gmx_bool here since this file must be possible to compile without simple.h.
177 gmx_cpuid_feature (gmx_cpuid_t cpuid,
178 enum gmx_cpuid_feature feature);
181 /* Return pointers to cpu topology information.
183 * Important: CPU topology requires more OS support than most other
184 * functions in this file, including support for thread pinning to hardware.
185 * This means it will not work on some platforms, including e.g. Mac OS X.
186 * Thus, it is IMPERATIVE that you check the return value from this routine
187 * before doing anything with the information. It is only if the return
188 * value is zero that the data is valid.
190 * For the returned values we have:
191 * - nprocessors Total number of logical processors reported by OS
192 * - npackages Usually number of CPU sockets
193 * - ncores_per_package Number of cores in each package
194 * - nhwthreads_per_core Number of hardware threads per core; 2 for hyperthreading.
195 * - package_id Array with the package index for each logical cpu
196 * - core_id Array with local core index for each logical cpu
197 * - hwthread_id Array with local hwthread index for each logical cpu
198 * - locality_order Array with logical cpu numbers, sorted in order
199 * of physical and logical locality in the system.
201 * All arrays are of length nprocessors.
204 gmx_cpuid_topology(gmx_cpuid_t cpuid,
207 int * ncores_per_package,
208 int * nhwthreads_per_core,
209 const int ** package_id,
210 const int ** core_id,
211 const int ** hwthread_id,
212 const int ** locality_order);
214 /* Enumerated values for x86 SMT enabled-status. Note that this does not refer
215 * to Hyper-Threading support (that is the flag GMX_CPUID_FEATURE_X86_HTT), but
216 * whether Hyper-Threading is _enabled_ and _used_ in bios right now.
218 enum gmx_cpuid_x86_smt
220 GMX_CPUID_X86_SMT_CANNOTDETECT,
221 GMX_CPUID_X86_SMT_DISABLED,
222 GMX_CPUID_X86_SMT_ENABLED
225 /* Returns the status of x86 SMT support. IMPORTANT: There are non-zero
226 * return values for this routine that still do not indicate supported and
227 * enabled smt/Hyper-Threading. You need to carefully check the return value
228 * against the enumerated type values to see what you are getting.
230 * Long-term, this functionality will move to a new hardware topology detection
231 * layer, but that will require a lot of new code and a working interface to the
232 * hwloc library. Surprisingly, there is no simple way to find out that
233 * Hyper-Threading is actually turned on without fully enumerating and checking
234 * all the cores, which we presently can only do on Linux. This means a couple
237 * 1) If you want to know whether your CPU _supports_ Hyper-Threading in the
238 * first place, check the GMX_CPUID_FEATURE_X86_HTT flag instead!
239 * 2) There are several scenarios where this routine will say that it cannot
240 * detect whether SMT is enabled and used right now.
241 * 3) If you need support on non-Linux x86, you have to write it :-)
242 * 4) Don't invest too much efforts, since this will be replaced with
243 * full hardware topology detection in the future.
244 * 5) Don't worry if the detection does not work. It is not a catastrophe, but
245 * but we get slightly better performance on x86 if we use Hyper-Threading
246 * cores in direct space, but not reciprocal space.
248 * Since this routine presently only supports Hyper-Threading we say X86_SMT
249 * in order not to give the impression we can detect any SMT. We haven't
250 * even tested the performance on other SMT implementations, so it is not
251 * obvious we shouldn't use SMT there.
253 * Note that you can get more complete topology information from
254 * gmx_cpuid_topology(), although that requires slightly more OS support.
256 enum gmx_cpuid_x86_smt
257 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid);
260 /* Formats a text string (up to n characters) from the data structure.
261 * The output will have max 80 chars between newline characters.
264 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
269 /* Suggests a suitable gromacs acceleration based on the support in the
272 enum gmx_cpuid_acceleration
273 gmx_cpuid_acceleration_suggest (gmx_cpuid_t cpuid);
276 /* Check if this binary was compiled with the same acceleration as we
277 * would suggest for the current hardware. Always print stats to the log file
278 * if it is non-NULL, and if we don't have a match, print a warning in log
279 * (if non-NULL) and if print_to_stderr!=0 also to stderr.
282 gmx_cpuid_acceleration_check (gmx_cpuid_t cpuid,
284 int print_to_stderr);
287 /* Release resources used by data structure. Note that the pointer to the
288 * CPU brand string will no longer be valid once this routine has been called.
291 gmx_cpuid_done (gmx_cpuid_t cpuid);
301 #endif /* GMX_CPUID_H_ */