1 /* -*- mode: c; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4; c-file-style: "stroustrup"; -*-
4 * This file is part of GROMACS.
7 * Written by the Gromacs development team under coordination of
8 * David van der Spoel, Berk Hess, and Erik Lindahl.
10 * This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
15 * To help us fund GROMACS development, we humbly ask that you cite
16 * the research papers on the package. Check out http://www.gromacs.org
19 * Gnomes, ROck Monsters And Chili Sauce
30 } /* fixes auto-indentation problems */
34 /* Currently identifiable CPU Vendors */
37 GMX_CPUID_VENDOR_CANNOTDETECT, /* Should only be used if something fails */
38 GMX_CPUID_VENDOR_UNKNOWN,
39 GMX_CPUID_VENDOR_INTEL,
45 /* CPU feature/property list, to be used as indices into the feature array of the
46 * gmxcpuid_t data structure.
48 * To facilitate looking things up, we keep this list alphabetical.
49 * The list is NOT exhaustive - we have basically added stuff that might be
50 * useful in an application like Gromacs.
52 * AMD and Intel tend to share most architectural elements, and even if the
53 * flags might have to be detected in different ways (different cpuid registers),
54 * once the flag is present the functions should be identical. Unfortunately the
55 * trend right now (2012) seems to be that they are diverging. This means that
56 * we need to use specific flags to the compiler to maximize performance, and
57 * then the binaries might not be portable between Intel and AMD as they were
58 * before when we only needed to check for SSE and/or SSE2 support in Gromacs.
60 enum gmx_cpuid_feature
62 GMX_CPUID_FEATURE_CANNOTDETECT, /* Flag set if we could not detect on this CPU */
63 GMX_CPUID_FEATURE_X86_AES, /* x86 advanced encryption standard accel. */
64 GMX_CPUID_FEATURE_X86_APIC, /* APIC support */
65 GMX_CPUID_FEATURE_X86_AVX, /* Advanced vector extensions */
66 GMX_CPUID_FEATURE_X86_AVX2, /* AVX2 including gather support (not used yet) */
67 GMX_CPUID_FEATURE_X86_CLFSH, /* Supports CLFLUSH instruction */
68 GMX_CPUID_FEATURE_X86_CMOV, /* Conditional move insn support */
69 GMX_CPUID_FEATURE_X86_CX8, /* Supports CMPXCHG8B (8-byte compare-exchange) */
70 GMX_CPUID_FEATURE_X86_CX16, /* Supports CMPXCHG16B (16-byte compare-exchg) */
71 GMX_CPUID_FEATURE_X86_F16C, /* Supports 16-bit FP conversion instructions */
72 GMX_CPUID_FEATURE_X86_FMA, /* Fused-multiply add support (mainly for AVX) */
73 GMX_CPUID_FEATURE_X86_FMA4, /* 4-operand FMA, only on AMD for now */
74 GMX_CPUID_FEATURE_X86_HTT, /* Hyper-Threading supported */
75 GMX_CPUID_FEATURE_X86_LAHF_LM, /* LAHF/SAHF support in 64 bits */
76 GMX_CPUID_FEATURE_X86_MISALIGNSSE, /* Support for misaligned SSE data instructions */
77 GMX_CPUID_FEATURE_X86_MMX, /* MMX registers and instructions */
78 GMX_CPUID_FEATURE_X86_MSR, /* Supports Intel model-specific-registers */
79 GMX_CPUID_FEATURE_X86_NONSTOP_TSC, /* Invariant TSC (constant rate in ACPI states) */
80 GMX_CPUID_FEATURE_X86_PCID, /* Process context identifier support */
81 GMX_CPUID_FEATURE_X86_PCLMULDQ, /* Carry-less 64-bit multiplication supported */
82 GMX_CPUID_FEATURE_X86_PDCM, /* Perfmon and Debug Capability */
83 GMX_CPUID_FEATURE_X86_PDPE1GB, /* Support for 1GB pages */
84 GMX_CPUID_FEATURE_X86_POPCNT, /* Supports the POPCNT (population count) insn */
85 GMX_CPUID_FEATURE_X86_PSE, /* Supports 4MB-pages (page size extension) */
86 GMX_CPUID_FEATURE_X86_RDRND, /* RDRAND high-quality hardware random numbers */
87 GMX_CPUID_FEATURE_X86_RDTSCP, /* Serializing rdtscp instruction available */
88 GMX_CPUID_FEATURE_X86_SSE2, /* SSE 2 */
89 GMX_CPUID_FEATURE_X86_SSE3, /* SSE 3 */
90 GMX_CPUID_FEATURE_X86_SSE4A, /* SSE 4A */
91 GMX_CPUID_FEATURE_X86_SSE4_1, /* SSE 4.1 */
92 GMX_CPUID_FEATURE_X86_SSE4_2, /* SSE 4.2 */
93 GMX_CPUID_FEATURE_X86_SSSE3, /* Supplemental SSE3 */
94 GMX_CPUID_FEATURE_X86_TDT, /* TSC deadline timer */
95 GMX_CPUID_FEATURE_X86_X2APIC, /* Extended xAPIC Support */
96 GMX_CPUID_FEATURE_X86_XOP, /* AMD extended instructions, only AMD for now */
101 /* Currently supported acceleration instruction sets, intrinsics or other similar combinations
102 * in Gromacs. There is not always a 1-to-1 correspondence with feature flags; on some AMD
103 * hardware we prefer to use 128bit AVX instructions (although 256-bit ones could be executed),
104 * and we still haven't written the AVX2 kernels.
106 enum gmx_cpuid_acceleration
108 GMX_CPUID_ACCELERATION_CANNOTDETECT, /* Should only be used if something fails */
109 GMX_CPUID_ACCELERATION_NONE,
110 GMX_CPUID_ACCELERATION_X86_SSE2,
111 GMX_CPUID_ACCELERATION_X86_SSE4_1,
112 GMX_CPUID_ACCELERATION_X86_AVX_128_FMA,
113 GMX_CPUID_ACCELERATION_X86_AVX_256,
114 GMX_CPUID_NACCELERATIONS
117 /* Text strings corresponding to CPU vendors */
119 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS];
121 /* Text strings for CPU feature indices */
123 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES];
125 /* Text strings for Gromacs acceleration/instruction sets */
127 gmx_cpuid_acceleration_string[GMX_CPUID_NACCELERATIONS];
130 /* Abstract data type with CPU detection information. Set by gmx_cpuid_init(). */
131 typedef struct gmx_cpuid *
135 /* Fill the data structure by using CPU detection instructions.
136 * Return 0 on success, 1 if something bad happened.
139 gmx_cpuid_init (gmx_cpuid_t * cpuid);
142 /* Return the vendor id as enumerated type. Use gmx_cpuid_vendor_string[]
143 * to get the corresponding text string.
145 enum gmx_cpuid_vendor
146 gmx_cpuid_vendor (gmx_cpuid_t cpuid);
149 /* Return a constant pointer to the processor brand string. */
151 gmx_cpuid_brand (gmx_cpuid_t cpuid);
154 /* Return processor family version. For a chip of version 1.2.3, this is 1 */
156 gmx_cpuid_family (gmx_cpuid_t cpuid);
158 /* Return processor model version, For a chip of version 1.2.3, this is 2. */
160 gmx_cpuid_model (gmx_cpuid_t cpuid);
162 /* Return processor stepping version, For a chip of version 1.2.3, this is 3. */
164 gmx_cpuid_stepping (gmx_cpuid_t cpuid);
167 /* Check whether a particular CPUID feature is set.
168 * Returns 0 if flag "feature" is not set, 1 if the flag is set. We cannot use
169 * gmx_bool here since this file must be possible to compile without simple.h.
172 gmx_cpuid_feature (gmx_cpuid_t cpuid,
173 enum gmx_cpuid_feature feature);
176 /* Enumerated values for x86 SMT enabled-status. Note that this does not refer
177 * to Hyper-Threading support (that is the flag GMX_CPUID_FEATURE_X86_HTT), but
178 * whether Hyper-Threading is _enabled_ and _used_ in bios right now.
180 enum gmx_cpuid_x86_smt
182 GMX_CPUID_X86_SMT_CANNOTDETECT,
183 GMX_CPUID_X86_SMT_DISABLED,
184 GMX_CPUID_X86_SMT_ENABLED
187 /* Returns the status of x86 SMT support. IMPORTANT: There are non-zero
188 * return values for this routine that still do not indicate supported and
189 * enabled smt/Hyper-Threading. You need to carefully check the return value
190 * against the enumerated type values to see what you are getting.
192 * Long-term, this functionality will move to a new hardware topology detection
193 * layer, but that will require a lot of new code and a working interface to the
194 * hwloc library. Surprisingly, there is no simple way to find out that
195 * Hyper-Threading is actually turned on without fully enumerating and checking
196 * all the cores, which we presently can only do on Linux. This means a couple
199 * 1) If you want to know whether your CPU _supports_ Hyper-Threading in the
200 * first place, check the GMX_CPUID_FEATURE_X86_HTT flag instead!
201 * 2) There are several scenarios where this routine will say that it cannot
202 * detect whether SMT is enabled and used right now.
203 * 3) If you need support on non-Linux x86, you have to write it :-)
204 * 4) Don't invest too much efforts, since this will be replaced with
205 * full hardware topology detection in the future.
206 * 5) Don't worry if the detection does not work. It is not a catastrophe, but
207 * but we get slightly better performance on x86 if we use Hyper-Threading
208 * cores in direct space, but not reciprocal space.
210 * Since this routine presently only supports Hyper-Threading we say X86_SMT
211 * in order not to give the impression we can detect any SMT. We haven't
212 * even tested the performance on other SMT implementations, so it is not
213 * obvious we shouldn't use SMT there.
215 enum gmx_cpuid_x86_smt
216 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid);
220 /* Formats a text string (up to n characters) from the data structure.
221 * The output will have max 80 chars between newline characters.
224 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
229 /* Suggests a suitable gromacs acceleration based on the support in the
232 enum gmx_cpuid_acceleration
233 gmx_cpuid_acceleration_suggest (gmx_cpuid_t cpuid);
236 /* Check if this binary was compiled with the same acceleration as we
237 * would suggest for the current hardware. Always print stats to the log file
238 * if it is non-NULL, and print a warning in stdout if we don't have a match.
241 gmx_cpuid_acceleration_check (gmx_cpuid_t cpuid,
245 /* Release resources used by data structure. Note that the pointer to the
246 * CPU brand string will no longer be valid once this routine has been called.
249 gmx_cpuid_done (gmx_cpuid_t cpuid);
259 #endif /* GMX_CPUID_H_ */