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41 # define _GNU_SOURCE 1
51 /* MSVC definition for __cpuid() */
53 /* sysinfo functions */
57 /* sysconf() definition */
61 #include "gmx_cpuid.h"
65 /* For convenience, and to enable configure-time invocation, we keep all architectures
66 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
69 /* OK, it is x86, but can we execute cpuid? */
70 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)))
71 # define GMX_CPUID_X86
75 /* Global constant character strings corresponding to our enumerated types */
77 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
88 gmx_cpuid_vendor_string_alternative[GMX_CPUID_NVENDORS] =
95 "ibm" /* Used on BlueGene/Q */
99 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
139 gmx_cpuid_simd_string[GMX_CPUID_NSIMD] =
153 /* Max length of brand string */
154 #define GMX_CPUID_BRAND_MAXLEN 256
157 /* Contents of the abstract datatype */
160 enum gmx_cpuid_vendor vendor;
161 char brand[GMX_CPUID_BRAND_MAXLEN];
165 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
166 char feature[GMX_CPUID_NFEATURES];
168 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
169 * operating systems and sometimes even settings. For most other architectures you can likely just check
170 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
172 int have_cpu_topology;
173 int nproc; /* total number of logical processors from OS */
175 int ncores_per_package;
176 int nhwthreads_per_core;
178 int * core_id; /* Local core id in each package */
179 int * hwthread_id; /* Local hwthread id in each core */
180 int * locality_order; /* Processor indices sorted in locality order */
184 /* Simple routines to access the data structure. The initialization routine is
185 * further down since that needs to call other static routines in this file.
187 enum gmx_cpuid_vendor
188 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
190 return cpuid->vendor;
195 gmx_cpuid_brand (gmx_cpuid_t cpuid)
201 gmx_cpuid_family (gmx_cpuid_t cpuid)
203 return cpuid->family;
207 gmx_cpuid_model (gmx_cpuid_t cpuid)
213 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
215 return cpuid->stepping;
219 gmx_cpuid_feature (gmx_cpuid_t cpuid,
220 enum gmx_cpuid_feature feature)
222 return (cpuid->feature[feature] != 0);
228 /* What type of SIMD was compiled in, if any? */
229 #ifdef GMX_SIMD_X86_AVX2_256
230 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX2_256;
231 #elif defined GMX_SIMD_X86_AVX_256
232 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_256;
233 #elif defined GMX_SIMD_X86_AVX_128_FMA
234 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
235 #elif defined GMX_SIMD_X86_SSE4_1
236 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE4_1;
237 #elif defined GMX_SIMD_X86_SSE2
238 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE2;
239 #elif defined GMX_SIMD_SPARC64_HPC_ACE
240 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
241 #elif defined GMX_SIMD_IBM_QPX
242 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_IBM_QPX;
243 #elif defined GMX_SIMD_REFERENCE
244 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_REFERENCE;
246 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_NONE;
252 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
253 * contents of register output is returned. See Intel/AMD docs for details.
255 * This version supports extended information where we can also have an input
256 * value in the ecx register. This is ignored for most levels, but some of them
257 * (e.g. level 0xB on Intel) use it.
260 execute_x86cpuid(unsigned int level,
269 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
270 * if the compiler handles GNU-style inline assembly.
273 #if (defined _MSC_VER)
276 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
277 /* MSVC 9.0 SP1 or later */
278 __cpuidex(CPUInfo, level, ecxval);
281 __cpuid(CPUInfo, level);
282 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
283 rc = (ecxval > 0) ? -1 : 0;
290 #elif (defined GMX_X86_GCC_INLINE_ASM)
291 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
292 * but there might be more options added in the future.
298 #if defined(__i386__) && defined(__PIC__)
299 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
300 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
302 "xchgl %%ebx, %1 \n\t"
303 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
305 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
306 __asm__ __volatile__ ("cpuid \n\t"
307 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
312 * Apparently this is an x86 platform where we don't know how to call cpuid.
314 * This is REALLY bad, since we will lose all Gromacs SIMD support.
327 /* Identify CPU features common to Intel & AMD - mainly brand string,
328 * version and some features. Vendor has already been detected outside this.
331 cpuid_check_common_x86(gmx_cpuid_t cpuid)
333 int fn, max_stdfn, max_extfn;
334 unsigned int eax, ebx, ecx, edx;
335 char str[GMX_CPUID_BRAND_MAXLEN];
338 /* Find largest standard/extended function input value */
339 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
341 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
345 if (max_extfn >= 0x80000005)
347 /* Get CPU brand string */
348 for (fn = 0x80000002; fn < 0x80000005; fn++)
350 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
352 memcpy(p+4, &ebx, 4);
353 memcpy(p+8, &ecx, 4);
354 memcpy(p+12, &edx, 4);
359 /* Remove empty initial space */
361 while (isspace(*(p)))
365 strncpy(cpuid->brand, p, GMX_CPUID_BRAND_MAXLEN);
369 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
372 /* Find basic CPU properties */
375 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
377 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
378 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
379 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
380 cpuid->stepping = (eax & 0x0000000F);
382 /* Feature flags common to AMD and intel */
383 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
384 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
385 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
386 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
387 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
388 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
389 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
390 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
391 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
392 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
393 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
394 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
396 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
397 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
398 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
399 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
400 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
401 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
402 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
403 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
404 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
410 cpuid->stepping = -1;
413 if (max_extfn >= 0x80000001)
415 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
416 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
417 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
418 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
421 if (max_extfn >= 0x80000007)
423 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
424 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
429 /* This routine returns the number of unique different elements found in the array,
430 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
431 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
432 * number of unique elements.
435 cpuid_renumber_elements(int *data, int n)
438 int i, j, nunique, found;
440 unique = malloc(sizeof(int)*n);
443 for (i = 0; i < n; i++)
445 for (j = 0, found = 0; j < nunique && !found; j++)
447 found = (data[i] == unique[j]);
451 /* Insert in sorted order! */
452 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
454 unique[j] = unique[j-1];
460 for (i = 0; i < n; i++)
462 for (j = 0; j < nunique; j++)
464 if (data[i] == unique[j])
473 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
475 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
476 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
477 * we know is that the part for each thread/core/package is unique, and how many bits are
478 * reserved for that part.
479 * This routine does internal renumbering so we get continuous indices, and also
480 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
481 * Returns: 0 on success, non-zero on failure.
484 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
487 int hwthread_mask, core_mask_after_shift;
489 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
490 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
491 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
492 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
494 hwthread_mask = (1 << hwthread_bits) - 1;
495 core_mask_after_shift = (1 << core_bits) - 1;
497 for (i = 0; i < cpuid->nproc; i++)
499 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
500 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
501 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
504 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
505 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
506 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
508 /* now check for consistency */
509 if ( (cpuid->npackages * cpuid->ncores_per_package *
510 cpuid->nhwthreads_per_core) != cpuid->nproc)
512 /* the packages/cores-per-package/hwthreads-per-core counts are
517 /* Create a locality order array, i.e. first all resources in package0, which in turn
518 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
521 for (i = 0; i < cpuid->nproc; i++)
523 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
524 cpuid->locality_order[idx] = i;
530 /* Detection of AMD-specific CPU features */
532 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
534 int max_stdfn, max_extfn, ret;
535 unsigned int eax, ebx, ecx, edx;
536 int hwthread_bits, core_bits;
539 cpuid_check_common_x86(cpuid);
541 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
544 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
547 if (max_extfn >= 0x80000001)
549 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
551 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
552 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
553 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
554 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
557 /* Query APIC information on AMD */
558 if (max_extfn >= 0x80000008)
560 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
563 cpu_set_t cpuset, save_cpuset;
564 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
565 apic_id = malloc(sizeof(int)*cpuid->nproc);
566 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
567 /* Get APIC id from each core */
569 for (i = 0; i < cpuid->nproc; i++)
572 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
573 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
574 apic_id[i] = ebx >> 24;
577 /* Reset affinity to the value it had when calling this routine */
578 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
579 #define CPUID_HAVE_APIC
580 #elif defined GMX_NATIVE_WINDOWS
584 unsigned int save_affinity, affinity;
585 GetSystemInfo( &sysinfo );
586 cpuid->nproc = sysinfo.dwNumberOfProcessors;
587 apic_id = malloc(sizeof(int)*cpuid->nproc);
588 /* Get previous affinity mask */
589 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
590 for (i = 0; i < cpuid->nproc; i++)
592 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
594 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
595 apic_id[i] = ebx >> 24;
597 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
598 #define CPUID_HAVE_APIC
600 #ifdef CPUID_HAVE_APIC
601 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
603 /* Get number of core bits in apic ID - try modern extended method first */
604 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
605 core_bits = (ecx >> 12) & 0xf;
608 /* Legacy method for old single/dual core AMD CPUs */
610 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
615 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
617 cpuid->have_cpu_topology = (ret == 0);
623 /* Detection of Intel-specific CPU features */
625 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
627 unsigned int max_stdfn, max_extfn, ret;
628 unsigned int eax, ebx, ecx, edx;
629 unsigned int max_logical_cores, max_physical_cores;
630 int hwthread_bits, core_bits;
633 cpuid_check_common_x86(cpuid);
635 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
638 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
643 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
644 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
645 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
646 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
647 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
652 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
653 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
656 /* Check whether Hyper-Threading is enabled, not only supported */
657 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
659 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
660 max_logical_cores = (ebx >> 16) & 0x0FF;
661 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
662 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
664 /* Clear HTT flag if we only have 1 logical core per physical */
665 if (max_logical_cores/max_physical_cores < 2)
667 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
671 if (max_stdfn >= 0xB)
673 /* Query x2 APIC information from cores */
674 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
677 cpu_set_t cpuset, save_cpuset;
678 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
679 apic_id = malloc(sizeof(int)*cpuid->nproc);
680 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
681 /* Get x2APIC ID from each hardware thread */
683 for (i = 0; i < cpuid->nproc; i++)
686 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
687 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
691 /* Reset affinity to the value it had when calling this routine */
692 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
693 #define CPUID_HAVE_APIC
694 #elif defined GMX_NATIVE_WINDOWS
698 unsigned int save_affinity, affinity;
699 GetSystemInfo( &sysinfo );
700 cpuid->nproc = sysinfo.dwNumberOfProcessors;
701 apic_id = malloc(sizeof(int)*cpuid->nproc);
702 /* Get previous affinity mask */
703 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
704 for (i = 0; i < cpuid->nproc; i++)
706 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
708 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
711 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
712 #define CPUID_HAVE_APIC
714 #ifdef CPUID_HAVE_APIC
715 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
716 hwthread_bits = eax & 0x1F;
717 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
718 core_bits = (eax & 0x1F) - hwthread_bits;
719 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
721 cpuid->have_cpu_topology = (ret == 0);
726 #endif /* GMX_CPUID_X86 */
732 chomp_substring_before_colon(const char *in, char *s, int maxlength)
735 strncpy(s, in, maxlength);
740 while (isspace(*(--p)) && (p >= s))
752 chomp_substring_after_colon(const char *in, char *s, int maxlength)
755 if ( (p = strchr(in, ':')) != NULL)
762 strncpy(s, p, maxlength);
764 while (isspace(*(--p)) && (p >= s))
775 /* Try to find the vendor of the current CPU, so we know what specific
776 * detection routine to call.
778 static enum gmx_cpuid_vendor
779 cpuid_check_vendor(void)
781 enum gmx_cpuid_vendor i, vendor;
782 /* Register data used on x86 */
783 unsigned int eax, ebx, ecx, edx;
784 char vendorstring[13];
786 char buffer[255], before_colon[255], after_colon[255];
788 /* Set default first */
789 vendor = GMX_CPUID_VENDOR_UNKNOWN;
792 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
794 memcpy(vendorstring, &ebx, 4);
795 memcpy(vendorstring+4, &edx, 4);
796 memcpy(vendorstring+8, &ecx, 4);
798 vendorstring[12] = '\0';
800 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
802 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
807 #elif defined(__linux__) || defined(__linux)
808 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
809 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
811 while ( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer, sizeof(buffer), fp) != NULL))
813 chomp_substring_before_colon(buffer, before_colon, sizeof(before_colon));
814 /* Intel/AMD use "vendor_id", IBM "vendor"(?) or "model". Fujitsu "manufacture". Add others if you have them! */
815 if (!strcmp(before_colon, "vendor_id")
816 || !strcmp(before_colon, "vendor")
817 || !strcmp(before_colon, "manufacture")
818 || !strcmp(before_colon, "model"))
820 chomp_substring_after_colon(buffer, after_colon, sizeof(after_colon));
821 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
823 /* Be liberal and accept if we find the vendor
824 * string (or alternative string) anywhere. Using
825 * strcasestr() would be non-portable. */
826 if (strstr(after_colon, gmx_cpuid_vendor_string[i])
827 || strstr(after_colon, gmx_cpuid_vendor_string_alternative[i]))
844 gmx_cpuid_topology(gmx_cpuid_t cpuid,
847 int * ncores_per_package,
848 int * nhwthreads_per_core,
849 const int ** package_id,
850 const int ** core_id,
851 const int ** hwthread_id,
852 const int ** locality_order)
856 if (cpuid->have_cpu_topology)
858 *nprocessors = cpuid->nproc;
859 *npackages = cpuid->npackages;
860 *ncores_per_package = cpuid->ncores_per_package;
861 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
862 *package_id = cpuid->package_id;
863 *core_id = cpuid->core_id;
864 *hwthread_id = cpuid->hwthread_id;
865 *locality_order = cpuid->locality_order;
876 enum gmx_cpuid_x86_smt
877 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
879 enum gmx_cpuid_x86_smt rc;
881 if (cpuid->have_cpu_topology)
883 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
885 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
887 rc = GMX_CPUID_X86_SMT_DISABLED;
891 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
898 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
903 char buffer[255], buffer2[255];
906 cpuid = malloc(sizeof(*cpuid));
910 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
912 cpuid->feature[i] = 0;
915 cpuid->have_cpu_topology = 0;
917 cpuid->npackages = 0;
918 cpuid->ncores_per_package = 0;
919 cpuid->nhwthreads_per_core = 0;
920 cpuid->package_id = NULL;
921 cpuid->core_id = NULL;
922 cpuid->hwthread_id = NULL;
923 cpuid->locality_order = NULL;
925 cpuid->vendor = cpuid_check_vendor();
927 switch (cpuid->vendor)
930 case GMX_CPUID_VENDOR_INTEL:
931 cpuid_check_intel_x86(cpuid);
933 case GMX_CPUID_VENDOR_AMD:
934 cpuid_check_amd_x86(cpuid);
939 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
940 #if defined(__linux__) || defined(__linux)
941 /* General Linux. Try to get CPU type from /proc/cpuinfo */
942 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
945 while ( (found_brand == 0) && (fgets(buffer, sizeof(buffer), fp) != NULL))
947 chomp_substring_before_colon(buffer, buffer2, sizeof(buffer2));
948 /* Intel uses "model name", Fujitsu and IBM "cpu". */
949 if (!strcmp(buffer2, "model name") || !strcmp(buffer2, "cpu"))
951 chomp_substring_after_colon(buffer, cpuid->brand, GMX_CPUID_BRAND_MAXLEN);
962 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
964 cpuid->feature[i] = 0;
966 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
975 gmx_cpuid_done (gmx_cpuid_t cpuid)
982 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
988 enum gmx_cpuid_feature feature;
994 "Family: %2d Model: %2d Stepping: %2d\n"
996 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
997 gmx_cpuid_brand(cpuid),
998 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1003 "Family: %2d Model: %2d Stepping: %2d\n"
1005 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1006 gmx_cpuid_brand(cpuid),
1007 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1015 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
1017 if (gmx_cpuid_feature(cpuid, feature) == 1)
1020 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1022 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1031 _snprintf(str, n, "\n");
1033 snprintf(str, n, "\n");
1043 gmx_cpuid_simd_suggest (gmx_cpuid_t cpuid)
1045 enum gmx_cpuid_simd tmpsimd;
1047 tmpsimd = GMX_CPUID_SIMD_NONE;
1049 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1051 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX2))
1053 tmpsimd = GMX_CPUID_SIMD_X86_AVX2_256;
1055 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1057 tmpsimd = GMX_CPUID_SIMD_X86_AVX_256;
1059 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1061 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1063 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1065 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1068 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1070 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1072 tmpsimd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
1074 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1076 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1078 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1080 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1083 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_FUJITSU)
1085 if (strstr(gmx_cpuid_brand(cpuid), "SPARC64"))
1087 tmpsimd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
1090 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_IBM)
1092 if (strstr(gmx_cpuid_brand(cpuid), "A2"))
1094 tmpsimd = GMX_CPUID_SIMD_IBM_QPX;
1103 gmx_cpuid_simd_check(gmx_cpuid_t cpuid,
1105 int print_to_stderr)
1109 enum gmx_cpuid_simd simd;
1111 simd = gmx_cpuid_simd_suggest(cpuid);
1113 rc = (simd != compiled_simd);
1115 gmx_cpuid_formatstring(cpuid, str, 1023);
1121 "\nDetecting CPU SIMD instructions.\nPresent hardware specification:\n"
1123 "SIMD instructions most likely to fit this hardware: %s\n"
1124 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1126 gmx_cpuid_simd_string[simd],
1127 gmx_cpuid_simd_string[compiled_simd]);
1134 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1135 "SIMD instructions most likely to fit this hardware: %s\n"
1136 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1137 gmx_cpuid_simd_string[simd],
1138 gmx_cpuid_simd_string[compiled_simd]);
1140 if (print_to_stderr)
1142 fprintf(stderr, "Compiled SIMD instructions: %s (Gromacs could use %s on this machine, which is better)\n",
1143 gmx_cpuid_simd_string[compiled_simd],
1144 gmx_cpuid_simd_string[simd]);
1151 #ifdef GMX_CPUID_STANDALONE
1152 /* Stand-alone program to enable queries of CPU features from Cmake.
1153 * Note that you need to check inline ASM capabilities before compiling and set
1154 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1157 main(int argc, char **argv)
1160 enum gmx_cpuid_simd simd;
1166 "Usage:\n\n%s [flags]\n\n"
1167 "Available flags:\n"
1168 "-vendor Print CPU vendor.\n"
1169 "-brand Print CPU brand string.\n"
1170 "-family Print CPU family version.\n"
1171 "-model Print CPU model version.\n"
1172 "-stepping Print CPU stepping version.\n"
1173 "-features Print CPU feature flags.\n"
1174 "-simd Print suggested GROMACS SIMD instructions.\n",
1179 gmx_cpuid_init(&cpuid);
1181 if (!strncmp(argv[1], "-vendor", 3))
1183 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1185 else if (!strncmp(argv[1], "-brand", 3))
1187 printf("%s\n", cpuid->brand);
1189 else if (!strncmp(argv[1], "-family", 3))
1191 printf("%d\n", cpuid->family);
1193 else if (!strncmp(argv[1], "-model", 3))
1195 printf("%d\n", cpuid->model);
1197 else if (!strncmp(argv[1], "-stepping", 3))
1199 printf("%d\n", cpuid->stepping);
1201 else if (!strncmp(argv[1], "-features", 3))
1204 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1206 if (cpuid->feature[i] == 1)
1212 printf("%s", gmx_cpuid_feature_string[i]);
1217 else if (!strncmp(argv[1], "-simd", 3))
1219 simd = gmx_cpuid_simd_suggest(cpuid);
1220 fprintf(stdout, "%s\n", gmx_cpuid_simd_string[simd]);
1223 gmx_cpuid_done(cpuid);