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49 /* MSVC definition for __cpuid() */
51 /* sysinfo functions */
55 /* sysconf() definition */
59 #include "gmx_cpuid.h"
63 /* For convenience, and to enable configure-time invocation, we keep all architectures
64 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
67 /* OK, it is x86, but can we execute cpuid? */
68 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)))
69 # define GMX_CPUID_X86
73 /* Global constant character strings corresponding to our enumerated types */
75 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
86 gmx_cpuid_vendor_string_alternative[GMX_CPUID_NVENDORS] =
93 "ibm" /* Used on BlueGene/Q */
97 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
137 gmx_cpuid_acceleration_string[GMX_CPUID_NACCELERATIONS] =
150 /* Max length of brand string */
151 #define GMX_CPUID_BRAND_MAXLEN 256
154 /* Contents of the abstract datatype */
157 enum gmx_cpuid_vendor vendor;
158 char brand[GMX_CPUID_BRAND_MAXLEN];
162 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
163 char feature[GMX_CPUID_NFEATURES];
165 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
166 * operating systems and sometimes even settings. For most other architectures you can likely just check
167 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
169 int have_cpu_topology;
170 int nproc; /* total number of logical processors from OS */
172 int ncores_per_package;
173 int nhwthreads_per_core;
175 int * core_id; /* Local core id in each package */
176 int * hwthread_id; /* Local hwthread id in each core */
177 int * locality_order; /* Processor indices sorted in locality order */
181 /* Simple routines to access the data structure. The initialization routine is
182 * further down since that needs to call other static routines in this file.
184 enum gmx_cpuid_vendor
185 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
187 return cpuid->vendor;
192 gmx_cpuid_brand (gmx_cpuid_t cpuid)
198 gmx_cpuid_family (gmx_cpuid_t cpuid)
200 return cpuid->family;
204 gmx_cpuid_model (gmx_cpuid_t cpuid)
210 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
212 return cpuid->stepping;
216 gmx_cpuid_feature (gmx_cpuid_t cpuid,
217 enum gmx_cpuid_feature feature)
219 return (cpuid->feature[feature] != 0);
225 /* What type of acceleration was compiled in, if any?
226 * This is set from Cmake. Note that the SSE2 and SSE4_1 macros are set for
227 * AVX too, so it is important that they appear last in the list.
229 #ifdef GMX_X86_AVX_256
231 enum gmx_cpuid_acceleration
232 compiled_acc = GMX_CPUID_ACCELERATION_X86_AVX_256;
233 #elif defined GMX_X86_AVX_128_FMA
235 enum gmx_cpuid_acceleration
236 compiled_acc = GMX_CPUID_ACCELERATION_X86_AVX_128_FMA;
237 #elif defined GMX_X86_SSE4_1
239 enum gmx_cpuid_acceleration
240 compiled_acc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
241 #elif defined GMX_X86_SSE2
243 enum gmx_cpuid_acceleration
244 compiled_acc = GMX_CPUID_ACCELERATION_X86_SSE2;
245 #elif defined GMX_CPU_ACCELERATION_SPARC64_HPC_ACE
247 enum gmx_cpuid_acceleration
248 compiled_acc = GMX_CPUID_ACCELERATION_SPARC64_HPC_ACE;
249 #elif defined GMX_CPU_ACCELERATION_IBM_QPX
251 enum gmx_cpuid_acceleration
252 compiled_acc = GMX_CPUID_ACCELERATION_IBM_QPX;
255 enum gmx_cpuid_acceleration
256 compiled_acc = GMX_CPUID_ACCELERATION_NONE;
262 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
263 * contents of register output is returned. See Intel/AMD docs for details.
265 * This version supports extended information where we can also have an input
266 * value in the ecx register. This is ignored for most levels, but some of them
267 * (e.g. level 0xB on Intel) use it.
270 execute_x86cpuid(unsigned int level,
279 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
280 * if the compiler handles GNU-style inline assembly.
283 #if (defined _MSC_VER)
286 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
287 /* MSVC 9.0 SP1 or later */
288 __cpuidex(CPUInfo, level, ecxval);
291 __cpuid(CPUInfo, level);
292 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
293 rc = (ecxval > 0) ? -1 : 0;
300 #elif (defined GMX_X86_GCC_INLINE_ASM)
301 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
302 * but there might be more options added in the future.
308 #if defined(__i386__) && defined(__PIC__)
309 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
310 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
312 "xchgl %%ebx, %1 \n\t"
313 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
315 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
316 __asm__ __volatile__ ("cpuid \n\t"
317 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
322 * Apparently this is an x86 platform where we don't know how to call cpuid.
324 * This is REALLY bad, since we will lose all Gromacs acceleration.
337 /* Identify CPU features common to Intel & AMD - mainly brand string,
338 * version and some features. Vendor has already been detected outside this.
341 cpuid_check_common_x86(gmx_cpuid_t cpuid)
343 int fn, max_stdfn, max_extfn;
344 unsigned int eax, ebx, ecx, edx;
345 char str[GMX_CPUID_BRAND_MAXLEN];
348 /* Find largest standard/extended function input value */
349 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
351 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
355 if (max_extfn >= 0x80000005)
357 /* Get CPU brand string */
358 for (fn = 0x80000002; fn < 0x80000005; fn++)
360 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
362 memcpy(p+4, &ebx, 4);
363 memcpy(p+8, &ecx, 4);
364 memcpy(p+12, &edx, 4);
369 /* Remove empty initial space */
371 while (isspace(*(p)))
375 strncpy(cpuid->brand, p, GMX_CPUID_BRAND_MAXLEN);
379 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
382 /* Find basic CPU properties */
385 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
387 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
388 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
389 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
390 cpuid->stepping = (eax & 0x0000000F);
392 /* Feature flags common to AMD and intel */
393 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
394 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
395 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
396 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
397 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
398 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
399 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
400 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
401 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
402 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
403 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
404 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
406 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
407 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
408 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
409 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
410 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
411 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
412 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
413 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
414 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
420 cpuid->stepping = -1;
423 if (max_extfn >= 0x80000001)
425 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
426 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
427 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
428 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
431 if (max_extfn >= 0x80000007)
433 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
434 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
439 /* This routine returns the number of unique different elements found in the array,
440 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
441 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
442 * number of unique elements.
445 cpuid_renumber_elements(int *data, int n)
448 int i, j, nunique, found;
450 unique = malloc(sizeof(int)*n);
453 for (i = 0; i < n; i++)
455 for (j = 0, found = 0; j < nunique && !found; j++)
457 found = (data[i] == unique[j]);
461 /* Insert in sorted order! */
462 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
464 unique[j] = unique[j-1];
470 for (i = 0; i < n; i++)
472 for (j = 0; j < nunique; j++)
474 if (data[i] == unique[j])
483 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
485 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
486 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
487 * we know is that the part for each thread/core/package is unique, and how many bits are
488 * reserved for that part.
489 * This routine does internal renumbering so we get continuous indices, and also
490 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
491 * Returns: 0 on success, non-zero on failure.
494 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
497 int hwthread_mask, core_mask_after_shift;
499 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
500 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
501 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
502 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
504 hwthread_mask = (1 << hwthread_bits) - 1;
505 core_mask_after_shift = (1 << core_bits) - 1;
507 for (i = 0; i < cpuid->nproc; i++)
509 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
510 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
511 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
514 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
515 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
516 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
518 /* now check for consistency */
519 if ( (cpuid->npackages * cpuid->ncores_per_package *
520 cpuid->nhwthreads_per_core) != cpuid->nproc)
522 /* the packages/cores-per-package/hwthreads-per-core counts are
527 /* Create a locality order array, i.e. first all resources in package0, which in turn
528 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
531 for (i = 0; i < cpuid->nproc; i++)
533 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
534 cpuid->locality_order[idx] = i;
540 /* Detection of AMD-specific CPU features */
542 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
544 int max_stdfn, max_extfn, ret;
545 unsigned int eax, ebx, ecx, edx;
546 int hwthread_bits, core_bits;
549 cpuid_check_common_x86(cpuid);
551 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
554 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
557 if (max_extfn >= 0x80000001)
559 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
561 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
562 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
563 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
564 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
567 /* Query APIC information on AMD */
568 if (max_extfn >= 0x80000008)
570 #if (defined HAVE_SCHED_H && defined HAVE_SCHED_SETAFFINITY && defined HAVE_SYSCONF && defined __linux__)
573 cpu_set_t cpuset, save_cpuset;
574 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
575 apic_id = malloc(sizeof(int)*cpuid->nproc);
576 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
577 /* Get APIC id from each core */
579 for (i = 0; i < cpuid->nproc; i++)
582 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
583 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
584 apic_id[i] = ebx >> 24;
587 /* Reset affinity to the value it had when calling this routine */
588 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
589 #define CPUID_HAVE_APIC
590 #elif defined GMX_NATIVE_WINDOWS
594 unsigned int save_affinity, affinity;
595 GetSystemInfo( &sysinfo );
596 cpuid->nproc = sysinfo.dwNumberOfProcessors;
597 apic_id = malloc(sizeof(int)*cpuid->nproc);
598 /* Get previous affinity mask */
599 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
600 for (i = 0; i < cpuid->nproc; i++)
602 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
604 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
605 apic_id[i] = ebx >> 24;
607 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
608 #define CPUID_HAVE_APIC
610 #ifdef CPUID_HAVE_APIC
611 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
613 /* Get number of core bits in apic ID - try modern extended method first */
614 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
615 core_bits = (ecx >> 12) & 0xf;
618 /* Legacy method for old single/dual core AMD CPUs */
620 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
625 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
627 cpuid->have_cpu_topology = (ret == 0);
633 /* Detection of Intel-specific CPU features */
635 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
637 unsigned int max_stdfn, max_extfn, ret;
638 unsigned int eax, ebx, ecx, edx;
639 unsigned int max_logical_cores, max_physical_cores;
640 int hwthread_bits, core_bits;
643 cpuid_check_common_x86(cpuid);
645 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
648 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
653 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
654 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
655 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
656 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
657 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
662 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
663 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
666 /* Check whether Hyper-Threading is enabled, not only supported */
667 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
669 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
670 max_logical_cores = (ebx >> 16) & 0x0FF;
671 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
672 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
674 /* Clear HTT flag if we only have 1 logical core per physical */
675 if (max_logical_cores/max_physical_cores < 2)
677 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
681 if (max_stdfn >= 0xB)
683 /* Query x2 APIC information from cores */
684 #if (defined HAVE_SCHED_H && defined HAVE_SCHED_SETAFFINITY && defined HAVE_SYSCONF && defined __linux__)
687 cpu_set_t cpuset, save_cpuset;
688 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
689 apic_id = malloc(sizeof(int)*cpuid->nproc);
690 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
691 /* Get x2APIC ID from each hardware thread */
693 for (i = 0; i < cpuid->nproc; i++)
696 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
697 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
701 /* Reset affinity to the value it had when calling this routine */
702 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
703 #define CPUID_HAVE_APIC
704 #elif defined GMX_NATIVE_WINDOWS
708 unsigned int save_affinity, affinity;
709 GetSystemInfo( &sysinfo );
710 cpuid->nproc = sysinfo.dwNumberOfProcessors;
711 apic_id = malloc(sizeof(int)*cpuid->nproc);
712 /* Get previous affinity mask */
713 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
714 for (i = 0; i < cpuid->nproc; i++)
716 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
718 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
721 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
722 #define CPUID_HAVE_APIC
724 #ifdef CPUID_HAVE_APIC
725 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
726 hwthread_bits = eax & 0x1F;
727 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
728 core_bits = (eax & 0x1F) - hwthread_bits;
729 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
731 cpuid->have_cpu_topology = (ret == 0);
736 #endif /* GMX_CPUID_X86 */
742 chomp_substring_before_colon(const char *in, char *s, int maxlength)
745 strncpy(s, in, maxlength);
750 while (isspace(*(--p)) && (p >= s))
762 chomp_substring_after_colon(const char *in, char *s, int maxlength)
765 if ( (p = strchr(in, ':')) != NULL)
772 strncpy(s, p, maxlength);
774 while (isspace(*(--p)) && (p >= s))
785 /* Try to find the vendor of the current CPU, so we know what specific
786 * detection routine to call.
788 static enum gmx_cpuid_vendor
789 cpuid_check_vendor(void)
791 enum gmx_cpuid_vendor i, vendor;
792 /* Register data used on x86 */
793 unsigned int eax, ebx, ecx, edx;
794 char vendorstring[13];
796 char buffer[255], before_colon[255], after_colon[255];
798 /* Set default first */
799 vendor = GMX_CPUID_VENDOR_UNKNOWN;
802 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
804 memcpy(vendorstring, &ebx, 4);
805 memcpy(vendorstring+4, &edx, 4);
806 memcpy(vendorstring+8, &ecx, 4);
808 vendorstring[12] = '\0';
810 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
812 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
817 #elif defined(__linux__) || defined(__linux)
818 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
819 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
821 while ( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer, sizeof(buffer), fp) != NULL))
823 chomp_substring_before_colon(buffer, before_colon, sizeof(before_colon));
824 /* Intel/AMD use "vendor_id", IBM "vendor"(?) or "model". Fujitsu "manufacture". Add others if you have them! */
825 if (!strcmp(before_colon, "vendor_id")
826 || !strcmp(before_colon, "vendor")
827 || !strcmp(before_colon, "manufacture")
828 || !strcmp(before_colon, "model"))
830 chomp_substring_after_colon(buffer, after_colon, sizeof(after_colon));
831 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
833 /* Be liberal and accept if we find the vendor
834 * string (or alternative string) anywhere. Using
835 * strcasestr() would be non-portable. */
836 if (strstr(after_colon, gmx_cpuid_vendor_string[i])
837 || strstr(after_colon, gmx_cpuid_vendor_string_alternative[i]))
854 gmx_cpuid_topology(gmx_cpuid_t cpuid,
857 int * ncores_per_package,
858 int * nhwthreads_per_core,
859 const int ** package_id,
860 const int ** core_id,
861 const int ** hwthread_id,
862 const int ** locality_order)
866 if (cpuid->have_cpu_topology)
868 *nprocessors = cpuid->nproc;
869 *npackages = cpuid->npackages;
870 *ncores_per_package = cpuid->ncores_per_package;
871 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
872 *package_id = cpuid->package_id;
873 *core_id = cpuid->core_id;
874 *hwthread_id = cpuid->hwthread_id;
875 *locality_order = cpuid->locality_order;
886 enum gmx_cpuid_x86_smt
887 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
889 enum gmx_cpuid_x86_smt rc;
891 if (cpuid->have_cpu_topology)
893 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
895 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
897 rc = GMX_CPUID_X86_SMT_DISABLED;
901 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
908 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
913 char buffer[255], buffer2[255];
916 cpuid = malloc(sizeof(*cpuid));
920 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
922 cpuid->feature[i] = 0;
925 cpuid->have_cpu_topology = 0;
927 cpuid->npackages = 0;
928 cpuid->ncores_per_package = 0;
929 cpuid->nhwthreads_per_core = 0;
930 cpuid->package_id = NULL;
931 cpuid->core_id = NULL;
932 cpuid->hwthread_id = NULL;
933 cpuid->locality_order = NULL;
935 cpuid->vendor = cpuid_check_vendor();
937 switch (cpuid->vendor)
940 case GMX_CPUID_VENDOR_INTEL:
941 cpuid_check_intel_x86(cpuid);
943 case GMX_CPUID_VENDOR_AMD:
944 cpuid_check_amd_x86(cpuid);
949 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
950 #if defined(__linux__) || defined(__linux)
951 /* General Linux. Try to get CPU type from /proc/cpuinfo */
952 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
955 while ( (found_brand == 0) && (fgets(buffer, sizeof(buffer), fp) != NULL))
957 chomp_substring_before_colon(buffer, buffer2, sizeof(buffer2));
958 /* Intel uses "model name", Fujitsu and IBM "cpu". */
959 if (!strcmp(buffer2, "model name") || !strcmp(buffer2, "cpu"))
961 chomp_substring_after_colon(buffer, cpuid->brand, GMX_CPUID_BRAND_MAXLEN);
972 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
974 cpuid->feature[i] = 0;
976 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
985 gmx_cpuid_done (gmx_cpuid_t cpuid)
992 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
998 enum gmx_cpuid_feature feature;
1004 "Family: %2d Model: %2d Stepping: %2d\n"
1006 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1007 gmx_cpuid_brand(cpuid),
1008 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1013 "Family: %2d Model: %2d Stepping: %2d\n"
1015 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1016 gmx_cpuid_brand(cpuid),
1017 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1025 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
1027 if (gmx_cpuid_feature(cpuid, feature) == 1)
1030 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1032 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1041 _snprintf(str, n, "\n");
1043 snprintf(str, n, "\n");
1052 enum gmx_cpuid_acceleration
1053 gmx_cpuid_acceleration_suggest (gmx_cpuid_t cpuid)
1055 enum gmx_cpuid_acceleration tmpacc;
1057 tmpacc = GMX_CPUID_ACCELERATION_NONE;
1059 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1061 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX2))
1063 tmpacc = GMX_CPUID_ACCELERATION_X86_AVX2_256;
1065 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1067 tmpacc = GMX_CPUID_ACCELERATION_X86_AVX_256;
1069 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1071 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
1073 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1075 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE2;
1078 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1080 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1082 tmpacc = GMX_CPUID_ACCELERATION_X86_AVX_128_FMA;
1084 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1086 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
1088 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1090 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE2;
1093 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_FUJITSU)
1095 if (strstr(gmx_cpuid_brand(cpuid), "SPARC64"))
1097 tmpacc = GMX_CPUID_ACCELERATION_SPARC64_HPC_ACE;
1100 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_IBM)
1102 if (strstr(gmx_cpuid_brand(cpuid), "A2"))
1104 tmpacc = GMX_CPUID_ACCELERATION_IBM_QPX;
1113 gmx_cpuid_acceleration_check(gmx_cpuid_t cpuid,
1115 int print_to_stderr)
1119 enum gmx_cpuid_acceleration acc;
1121 acc = gmx_cpuid_acceleration_suggest(cpuid);
1123 rc = (acc != compiled_acc);
1125 gmx_cpuid_formatstring(cpuid, str, 1023);
1131 "\nDetecting CPU-specific acceleration.\nPresent hardware specification:\n"
1133 "Acceleration most likely to fit this hardware: %s\n"
1134 "Acceleration selected at GROMACS compile time: %s\n\n",
1136 gmx_cpuid_acceleration_string[acc],
1137 gmx_cpuid_acceleration_string[compiled_acc]);
1144 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1145 "Acceleration most likely to fit this hardware: %s\n"
1146 "Acceleration selected at GROMACS compile time: %s\n\n",
1147 gmx_cpuid_acceleration_string[acc],
1148 gmx_cpuid_acceleration_string[compiled_acc]);
1150 if (print_to_stderr)
1152 fprintf(stderr, "Compiled acceleration: %s (Gromacs could use %s on this machine, which is better)\n",
1153 gmx_cpuid_acceleration_string[compiled_acc],
1154 gmx_cpuid_acceleration_string[acc]);
1161 #ifdef GMX_CPUID_STANDALONE
1162 /* Stand-alone program to enable queries of CPU features from Cmake.
1163 * Note that you need to check inline ASM capabilities before compiling and set
1164 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1167 main(int argc, char **argv)
1170 enum gmx_cpuid_acceleration acc;
1176 "Usage:\n\n%s [flags]\n\n"
1177 "Available flags:\n"
1178 "-vendor Print CPU vendor.\n"
1179 "-brand Print CPU brand string.\n"
1180 "-family Print CPU family version.\n"
1181 "-model Print CPU model version.\n"
1182 "-stepping Print CPU stepping version.\n"
1183 "-features Print CPU feature flags.\n"
1184 "-acceleration Print suggested GROMACS acceleration.\n",
1189 gmx_cpuid_init(&cpuid);
1191 if (!strncmp(argv[1], "-vendor", 3))
1193 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1195 else if (!strncmp(argv[1], "-brand", 3))
1197 printf("%s\n", cpuid->brand);
1199 else if (!strncmp(argv[1], "-family", 3))
1201 printf("%d\n", cpuid->family);
1203 else if (!strncmp(argv[1], "-model", 3))
1205 printf("%d\n", cpuid->model);
1207 else if (!strncmp(argv[1], "-stepping", 3))
1209 printf("%d\n", cpuid->stepping);
1211 else if (!strncmp(argv[1], "-features", 3))
1214 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1216 if (cpuid->feature[i] == 1)
1222 printf("%s", gmx_cpuid_feature_string[i]);
1227 else if (!strncmp(argv[1], "-acceleration", 3))
1229 acc = gmx_cpuid_acceleration_suggest(cpuid);
1230 fprintf(stdout, "%s\n", gmx_cpuid_acceleration_string[acc]);
1233 gmx_cpuid_done(cpuid);