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43 # define _GNU_SOURCE 1
53 /* MSVC definition for __cpuid() */
55 /* sysinfo functions */
59 /* sysconf() definition */
63 #include "gromacs/legacyheaders/gmx_cpuid.h"
67 /* For convenience, and to enable configure-time invocation, we keep all architectures
68 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
71 /* OK, it is x86, but can we execute cpuid? */
72 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)))
73 # define GMX_CPUID_X86
77 /* Global constant character strings corresponding to our enumerated types */
79 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
90 gmx_cpuid_vendor_string_alternative[GMX_CPUID_NVENDORS] =
97 "ibm" /* Used on BlueGene/Q */
101 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
141 gmx_cpuid_simd_string[GMX_CPUID_NSIMD] =
155 /* Max length of brand string */
156 #define GMX_CPUID_BRAND_MAXLEN 256
159 /* Contents of the abstract datatype */
162 enum gmx_cpuid_vendor vendor;
163 char brand[GMX_CPUID_BRAND_MAXLEN];
167 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
168 char feature[GMX_CPUID_NFEATURES];
170 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
171 * operating systems and sometimes even settings. For most other architectures you can likely just check
172 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
174 int have_cpu_topology;
175 int nproc; /* total number of logical processors from OS */
177 int ncores_per_package;
178 int nhwthreads_per_core;
180 int * core_id; /* Local core id in each package */
181 int * hwthread_id; /* Local hwthread id in each core */
182 int * locality_order; /* Processor indices sorted in locality order */
186 /* Simple routines to access the data structure. The initialization routine is
187 * further down since that needs to call other static routines in this file.
189 enum gmx_cpuid_vendor
190 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
192 return cpuid->vendor;
197 gmx_cpuid_brand (gmx_cpuid_t cpuid)
203 gmx_cpuid_family (gmx_cpuid_t cpuid)
205 return cpuid->family;
209 gmx_cpuid_model (gmx_cpuid_t cpuid)
215 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
217 return cpuid->stepping;
221 gmx_cpuid_feature (gmx_cpuid_t cpuid,
222 enum gmx_cpuid_feature feature)
224 return (cpuid->feature[feature] != 0);
230 /* What type of SIMD was compiled in, if any? */
231 #ifdef GMX_SIMD_X86_AVX2_256
232 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX2_256;
233 #elif defined GMX_SIMD_X86_AVX_256
234 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_256;
235 #elif defined GMX_SIMD_X86_AVX_128_FMA
236 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
237 #elif defined GMX_SIMD_X86_SSE4_1
238 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE4_1;
239 #elif defined GMX_SIMD_X86_SSE2
240 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE2;
241 #elif defined GMX_SIMD_SPARC64_HPC_ACE
242 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
243 #elif defined GMX_SIMD_IBM_QPX
244 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_IBM_QPX;
245 #elif defined GMX_SIMD_REFERENCE
246 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_REFERENCE;
248 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_NONE;
254 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
255 * contents of register output is returned. See Intel/AMD docs for details.
257 * This version supports extended information where we can also have an input
258 * value in the ecx register. This is ignored for most levels, but some of them
259 * (e.g. level 0xB on Intel) use it.
262 execute_x86cpuid(unsigned int level,
271 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
272 * if the compiler handles GNU-style inline assembly.
275 #if (defined _MSC_VER)
278 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
279 /* MSVC 9.0 SP1 or later */
280 __cpuidex(CPUInfo, level, ecxval);
283 __cpuid(CPUInfo, level);
284 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
285 rc = (ecxval > 0) ? -1 : 0;
292 #elif (defined GMX_X86_GCC_INLINE_ASM)
293 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
294 * but there might be more options added in the future.
300 #if defined(__i386__) && defined(__PIC__)
301 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
302 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
304 "xchgl %%ebx, %1 \n\t"
305 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
307 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
308 __asm__ __volatile__ ("cpuid \n\t"
309 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
314 * Apparently this is an x86 platform where we don't know how to call cpuid.
316 * This is REALLY bad, since we will lose all Gromacs SIMD support.
329 /* Identify CPU features common to Intel & AMD - mainly brand string,
330 * version and some features. Vendor has already been detected outside this.
333 cpuid_check_common_x86(gmx_cpuid_t cpuid)
335 int fn, max_stdfn, max_extfn;
336 unsigned int eax, ebx, ecx, edx;
337 char str[GMX_CPUID_BRAND_MAXLEN];
340 /* Find largest standard/extended function input value */
341 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
343 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
347 if (max_extfn >= 0x80000005)
349 /* Get CPU brand string */
350 for (fn = 0x80000002; fn < 0x80000005; fn++)
352 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
354 memcpy(p+4, &ebx, 4);
355 memcpy(p+8, &ecx, 4);
356 memcpy(p+12, &edx, 4);
361 /* Remove empty initial space */
363 while (isspace(*(p)))
367 strncpy(cpuid->brand, p, GMX_CPUID_BRAND_MAXLEN);
371 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
374 /* Find basic CPU properties */
377 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
379 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
380 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
381 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
382 cpuid->stepping = (eax & 0x0000000F);
384 /* Feature flags common to AMD and intel */
385 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
386 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
387 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
388 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
389 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
390 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
391 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
392 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
393 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
394 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
395 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
396 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
398 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
399 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
400 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
401 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
402 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
403 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
404 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
405 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
406 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
412 cpuid->stepping = -1;
415 if (max_extfn >= 0x80000001)
417 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
418 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
419 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
420 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
423 if (max_extfn >= 0x80000007)
425 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
426 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
431 /* This routine returns the number of unique different elements found in the array,
432 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
433 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
434 * number of unique elements.
437 cpuid_renumber_elements(int *data, int n)
440 int i, j, nunique, found;
442 unique = malloc(sizeof(int)*n);
445 for (i = 0; i < n; i++)
447 for (j = 0, found = 0; j < nunique && !found; j++)
449 found = (data[i] == unique[j]);
453 /* Insert in sorted order! */
454 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
456 unique[j] = unique[j-1];
462 for (i = 0; i < n; i++)
464 for (j = 0; j < nunique; j++)
466 if (data[i] == unique[j])
476 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
478 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
479 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
480 * we know is that the part for each thread/core/package is unique, and how many bits are
481 * reserved for that part.
482 * This routine does internal renumbering so we get continuous indices, and also
483 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
484 * Returns: 0 on success, non-zero on failure.
487 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
490 int hwthread_mask, core_mask_after_shift;
492 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
493 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
494 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
495 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
497 hwthread_mask = (1 << hwthread_bits) - 1;
498 core_mask_after_shift = (1 << core_bits) - 1;
500 for (i = 0; i < cpuid->nproc; i++)
502 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
503 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
504 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
507 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
508 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
509 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
511 /* now check for consistency */
512 if ( (cpuid->npackages * cpuid->ncores_per_package *
513 cpuid->nhwthreads_per_core) != cpuid->nproc)
515 /* the packages/cores-per-package/hwthreads-per-core counts are
520 /* Create a locality order array, i.e. first all resources in package0, which in turn
521 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
524 for (i = 0; i < cpuid->nproc; i++)
526 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
527 cpuid->locality_order[idx] = i;
533 /* Detection of AMD-specific CPU features */
535 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
537 int max_stdfn, max_extfn, ret;
538 unsigned int eax, ebx, ecx, edx;
539 int hwthread_bits, core_bits;
542 cpuid_check_common_x86(cpuid);
544 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
547 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
550 if (max_extfn >= 0x80000001)
552 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
554 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
555 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
556 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
557 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
560 /* Query APIC information on AMD */
561 if (max_extfn >= 0x80000008)
563 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
566 cpu_set_t cpuset, save_cpuset;
567 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
568 apic_id = malloc(sizeof(int)*cpuid->nproc);
569 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
570 /* Get APIC id from each core */
572 for (i = 0; i < cpuid->nproc; i++)
575 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
576 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
577 apic_id[i] = ebx >> 24;
580 /* Reset affinity to the value it had when calling this routine */
581 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
582 #define CPUID_HAVE_APIC
583 #elif defined GMX_NATIVE_WINDOWS
587 unsigned int save_affinity, affinity;
588 GetSystemInfo( &sysinfo );
589 cpuid->nproc = sysinfo.dwNumberOfProcessors;
590 apic_id = malloc(sizeof(int)*cpuid->nproc);
591 /* Get previous affinity mask */
592 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
593 for (i = 0; i < cpuid->nproc; i++)
595 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
597 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
598 apic_id[i] = ebx >> 24;
600 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
601 #define CPUID_HAVE_APIC
603 #ifdef CPUID_HAVE_APIC
604 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
606 /* Get number of core bits in apic ID - try modern extended method first */
607 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
608 core_bits = (ecx >> 12) & 0xf;
611 /* Legacy method for old single/dual core AMD CPUs */
613 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
618 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
620 cpuid->have_cpu_topology = (ret == 0);
626 /* Detection of Intel-specific CPU features */
628 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
630 unsigned int max_stdfn, max_extfn, ret;
631 unsigned int eax, ebx, ecx, edx;
632 unsigned int max_logical_cores, max_physical_cores;
633 int hwthread_bits, core_bits;
636 cpuid_check_common_x86(cpuid);
638 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
641 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
646 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
647 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
648 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
649 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
650 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
655 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
656 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
659 /* Check whether Hyper-Threading is enabled, not only supported */
660 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
662 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
663 max_logical_cores = (ebx >> 16) & 0x0FF;
664 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
665 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
667 /* Clear HTT flag if we only have 1 logical core per physical */
668 if (max_logical_cores/max_physical_cores < 2)
670 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
674 if (max_stdfn >= 0xB)
676 /* Query x2 APIC information from cores */
677 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
680 cpu_set_t cpuset, save_cpuset;
681 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
682 apic_id = malloc(sizeof(int)*cpuid->nproc);
683 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
684 /* Get x2APIC ID from each hardware thread */
686 for (i = 0; i < cpuid->nproc; i++)
689 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
690 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
694 /* Reset affinity to the value it had when calling this routine */
695 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
696 #define CPUID_HAVE_APIC
697 #elif defined GMX_NATIVE_WINDOWS
701 unsigned int save_affinity, affinity;
702 GetSystemInfo( &sysinfo );
703 cpuid->nproc = sysinfo.dwNumberOfProcessors;
704 apic_id = malloc(sizeof(int)*cpuid->nproc);
705 /* Get previous affinity mask */
706 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
707 for (i = 0; i < cpuid->nproc; i++)
709 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
711 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
714 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
715 #define CPUID_HAVE_APIC
717 #ifdef CPUID_HAVE_APIC
718 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
719 hwthread_bits = eax & 0x1F;
720 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
721 core_bits = (eax & 0x1F) - hwthread_bits;
722 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
724 cpuid->have_cpu_topology = (ret == 0);
729 #endif /* GMX_CPUID_X86 */
735 chomp_substring_before_colon(const char *in, char *s, int maxlength)
738 strncpy(s, in, maxlength);
743 while (isspace(*(--p)) && (p >= s))
755 chomp_substring_after_colon(const char *in, char *s, int maxlength)
758 if ( (p = strchr(in, ':')) != NULL)
765 strncpy(s, p, maxlength);
767 while (isspace(*(--p)) && (p >= s))
778 /* Try to find the vendor of the current CPU, so we know what specific
779 * detection routine to call.
781 static enum gmx_cpuid_vendor
782 cpuid_check_vendor(void)
784 enum gmx_cpuid_vendor i, vendor;
785 /* Register data used on x86 */
786 unsigned int eax, ebx, ecx, edx;
787 char vendorstring[13];
789 char buffer[255], before_colon[255], after_colon[255];
791 /* Set default first */
792 vendor = GMX_CPUID_VENDOR_UNKNOWN;
795 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
797 memcpy(vendorstring, &ebx, 4);
798 memcpy(vendorstring+4, &edx, 4);
799 memcpy(vendorstring+8, &ecx, 4);
801 vendorstring[12] = '\0';
803 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
805 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
810 #elif defined(__linux__) || defined(__linux)
811 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
812 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
814 while ( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer, sizeof(buffer), fp) != NULL))
816 chomp_substring_before_colon(buffer, before_colon, sizeof(before_colon));
817 /* Intel/AMD use "vendor_id", IBM "vendor"(?) or "model". Fujitsu "manufacture". Add others if you have them! */
818 if (!strcmp(before_colon, "vendor_id")
819 || !strcmp(before_colon, "vendor")
820 || !strcmp(before_colon, "manufacture")
821 || !strcmp(before_colon, "model"))
823 chomp_substring_after_colon(buffer, after_colon, sizeof(after_colon));
824 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
826 /* Be liberal and accept if we find the vendor
827 * string (or alternative string) anywhere. Using
828 * strcasestr() would be non-portable. */
829 if (strstr(after_colon, gmx_cpuid_vendor_string[i])
830 || strstr(after_colon, gmx_cpuid_vendor_string_alternative[i]))
847 gmx_cpuid_topology(gmx_cpuid_t cpuid,
850 int * ncores_per_package,
851 int * nhwthreads_per_core,
852 const int ** package_id,
853 const int ** core_id,
854 const int ** hwthread_id,
855 const int ** locality_order)
859 if (cpuid->have_cpu_topology)
861 *nprocessors = cpuid->nproc;
862 *npackages = cpuid->npackages;
863 *ncores_per_package = cpuid->ncores_per_package;
864 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
865 *package_id = cpuid->package_id;
866 *core_id = cpuid->core_id;
867 *hwthread_id = cpuid->hwthread_id;
868 *locality_order = cpuid->locality_order;
879 enum gmx_cpuid_x86_smt
880 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
882 enum gmx_cpuid_x86_smt rc;
884 if (cpuid->have_cpu_topology)
886 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
888 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
890 rc = GMX_CPUID_X86_SMT_DISABLED;
894 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
901 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
906 char buffer[255], buffer2[255];
909 cpuid = malloc(sizeof(*cpuid));
913 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
915 cpuid->feature[i] = 0;
918 cpuid->have_cpu_topology = 0;
920 cpuid->npackages = 0;
921 cpuid->ncores_per_package = 0;
922 cpuid->nhwthreads_per_core = 0;
923 cpuid->package_id = NULL;
924 cpuid->core_id = NULL;
925 cpuid->hwthread_id = NULL;
926 cpuid->locality_order = NULL;
928 cpuid->vendor = cpuid_check_vendor();
930 switch (cpuid->vendor)
933 case GMX_CPUID_VENDOR_INTEL:
934 cpuid_check_intel_x86(cpuid);
936 case GMX_CPUID_VENDOR_AMD:
937 cpuid_check_amd_x86(cpuid);
942 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
943 #if defined(__linux__) || defined(__linux)
944 /* General Linux. Try to get CPU type from /proc/cpuinfo */
945 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
948 while ( (found_brand == 0) && (fgets(buffer, sizeof(buffer), fp) != NULL))
950 chomp_substring_before_colon(buffer, buffer2, sizeof(buffer2));
951 /* Intel uses "model name", Fujitsu and IBM "cpu". */
952 if (!strcmp(buffer2, "model name") || !strcmp(buffer2, "cpu"))
954 chomp_substring_after_colon(buffer, cpuid->brand, GMX_CPUID_BRAND_MAXLEN);
965 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
967 cpuid->feature[i] = 0;
969 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
978 gmx_cpuid_done (gmx_cpuid_t cpuid)
985 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
991 enum gmx_cpuid_feature feature;
997 "Family: %2d Model: %2d Stepping: %2d\n"
999 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1000 gmx_cpuid_brand(cpuid),
1001 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1006 "Family: %2d Model: %2d Stepping: %2d\n"
1008 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1009 gmx_cpuid_brand(cpuid),
1010 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1018 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
1020 if (gmx_cpuid_feature(cpuid, feature) == 1)
1023 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1025 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1034 _snprintf(str, n, "\n");
1036 snprintf(str, n, "\n");
1046 gmx_cpuid_simd_suggest (gmx_cpuid_t cpuid)
1048 enum gmx_cpuid_simd tmpsimd;
1050 tmpsimd = GMX_CPUID_SIMD_NONE;
1052 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1054 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX2))
1056 tmpsimd = GMX_CPUID_SIMD_X86_AVX2_256;
1058 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1060 tmpsimd = GMX_CPUID_SIMD_X86_AVX_256;
1062 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1064 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1066 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1068 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1071 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1073 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1075 tmpsimd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
1077 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1079 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1081 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1083 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1086 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_FUJITSU)
1088 if (strstr(gmx_cpuid_brand(cpuid), "SPARC64"))
1090 tmpsimd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
1093 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_IBM)
1095 if (strstr(gmx_cpuid_brand(cpuid), "A2"))
1097 tmpsimd = GMX_CPUID_SIMD_IBM_QPX;
1106 gmx_cpuid_simd_check(gmx_cpuid_t cpuid,
1108 int print_to_stderr)
1112 enum gmx_cpuid_simd simd;
1114 simd = gmx_cpuid_simd_suggest(cpuid);
1116 rc = (simd != compiled_simd);
1118 gmx_cpuid_formatstring(cpuid, str, 1023);
1124 "\nDetecting CPU SIMD instructions.\nPresent hardware specification:\n"
1126 "SIMD instructions most likely to fit this hardware: %s\n"
1127 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1129 gmx_cpuid_simd_string[simd],
1130 gmx_cpuid_simd_string[compiled_simd]);
1137 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1138 "SIMD instructions most likely to fit this hardware: %s\n"
1139 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1140 gmx_cpuid_simd_string[simd],
1141 gmx_cpuid_simd_string[compiled_simd]);
1143 if (print_to_stderr)
1145 fprintf(stderr, "Compiled SIMD instructions: %s (Gromacs could use %s on this machine, which is better)\n",
1146 gmx_cpuid_simd_string[compiled_simd],
1147 gmx_cpuid_simd_string[simd]);
1154 #ifdef GMX_CPUID_STANDALONE
1155 /* Stand-alone program to enable queries of CPU features from Cmake.
1156 * Note that you need to check inline ASM capabilities before compiling and set
1157 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1160 main(int argc, char **argv)
1163 enum gmx_cpuid_simd simd;
1169 "Usage:\n\n%s [flags]\n\n"
1170 "Available flags:\n"
1171 "-vendor Print CPU vendor.\n"
1172 "-brand Print CPU brand string.\n"
1173 "-family Print CPU family version.\n"
1174 "-model Print CPU model version.\n"
1175 "-stepping Print CPU stepping version.\n"
1176 "-features Print CPU feature flags.\n"
1177 "-simd Print suggested GROMACS SIMD instructions.\n",
1182 gmx_cpuid_init(&cpuid);
1184 if (!strncmp(argv[1], "-vendor", 3))
1186 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1188 else if (!strncmp(argv[1], "-brand", 3))
1190 printf("%s\n", cpuid->brand);
1192 else if (!strncmp(argv[1], "-family", 3))
1194 printf("%d\n", cpuid->family);
1196 else if (!strncmp(argv[1], "-model", 3))
1198 printf("%d\n", cpuid->model);
1200 else if (!strncmp(argv[1], "-stepping", 3))
1202 printf("%d\n", cpuid->stepping);
1204 else if (!strncmp(argv[1], "-features", 3))
1207 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1209 if (cpuid->feature[i] == 1)
1215 printf("%s", gmx_cpuid_feature_string[i]);
1220 else if (!strncmp(argv[1], "-simd", 3))
1222 simd = gmx_cpuid_simd_suggest(cpuid);
1223 fprintf(stdout, "%s\n", gmx_cpuid_simd_string[simd]);
1226 gmx_cpuid_done(cpuid);