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37 #include "gromacs/legacyheaders/gmx_cpuid.h"
48 #ifdef GMX_NATIVE_WINDOWS
49 /* MSVC definition for __cpuid() */
53 /* sysinfo functions */
60 /* sysconf() definition */
65 /* For convenience, and to enable configure-time invocation, we keep all architectures
66 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
69 /* OK, it is x86, but can we execute cpuid? */
70 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)))
71 # define GMX_CPUID_X86
75 /* Global constant character strings corresponding to our enumerated types */
77 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
89 gmx_cpuid_vendor_string_alternative[GMX_CPUID_NVENDORS] =
96 "ibm", /* Used on BlueGene/Q */
101 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
143 gmx_cpuid_simd_string[GMX_CPUID_NSIMD] =
159 /* Max length of brand string */
160 #define GMX_CPUID_STRLEN 256
163 /* Contents of the abstract datatype */
166 enum gmx_cpuid_vendor vendor;
167 char brand[GMX_CPUID_STRLEN];
171 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
172 char feature[GMX_CPUID_NFEATURES];
174 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
175 * operating systems and sometimes even settings. For most other architectures you can likely just check
176 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
178 int have_cpu_topology;
179 int nproc; /* total number of logical processors from OS */
181 int ncores_per_package;
182 int nhwthreads_per_core;
184 int * core_id; /* Local core id in each package */
185 int * hwthread_id; /* Local hwthread id in each core */
186 int * locality_order; /* Processor indices sorted in locality order */
190 /* Simple routines to access the data structure. The initialization routine is
191 * further down since that needs to call other static routines in this file.
193 enum gmx_cpuid_vendor
194 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
196 return cpuid->vendor;
201 gmx_cpuid_brand (gmx_cpuid_t cpuid)
207 gmx_cpuid_family (gmx_cpuid_t cpuid)
209 return cpuid->family;
213 gmx_cpuid_model (gmx_cpuid_t cpuid)
219 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
221 return cpuid->stepping;
225 gmx_cpuid_feature (gmx_cpuid_t cpuid,
226 enum gmx_cpuid_feature feature)
228 return (cpuid->feature[feature] != 0);
234 /* What type of SIMD was compiled in, if any? */
235 #ifdef GMX_SIMD_X86_AVX2_256
236 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX2_256;
237 #elif defined GMX_SIMD_X86_AVX_256
238 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_256;
239 #elif defined GMX_SIMD_X86_AVX_128_FMA
240 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
241 #elif defined GMX_SIMD_X86_SSE4_1
242 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE4_1;
243 #elif defined GMX_SIMD_X86_SSE2
244 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_X86_SSE2;
245 #elif defined GMX_SIMD_ARM_NEON
246 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_ARM_NEON;
247 #elif defined GMX_SIMD_ARM_NEON_ASIMD
248 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_ARM_NEON_ASIMD;
249 #elif defined GMX_SIMD_SPARC64_HPC_ACE
250 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
251 #elif defined GMX_SIMD_IBM_QPX
252 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_IBM_QPX;
253 #elif defined GMX_SIMD_REFERENCE
254 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_REFERENCE;
256 static const enum gmx_cpuid_simd compiled_simd = GMX_CPUID_SIMD_NONE;
262 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
263 * contents of register output is returned. See Intel/AMD docs for details.
265 * This version supports extended information where we can also have an input
266 * value in the ecx register. This is ignored for most levels, but some of them
267 * (e.g. level 0xB on Intel) use it.
270 execute_x86cpuid(unsigned int level,
279 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
280 * if the compiler handles GNU-style inline assembly.
283 #if (defined _MSC_VER)
286 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
287 /* MSVC 9.0 SP1 or later */
288 __cpuidex(CPUInfo, level, ecxval);
291 __cpuid(CPUInfo, level);
292 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
293 rc = (ecxval > 0) ? -1 : 0;
300 #elif (defined GMX_X86_GCC_INLINE_ASM)
301 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
302 * but there might be more options added in the future.
308 #if defined(__i386__) && defined(__PIC__)
309 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
310 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
312 "xchgl %%ebx, %1 \n\t"
313 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
315 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
316 __asm__ __volatile__ ("cpuid \n\t"
317 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
322 * Apparently this is an x86 platform where we don't know how to call cpuid.
324 * This is REALLY bad, since we will lose all Gromacs SIMD support.
337 /* Identify CPU features common to Intel & AMD - mainly brand string,
338 * version and some features. Vendor has already been detected outside this.
341 cpuid_check_common_x86(gmx_cpuid_t cpuid)
343 int fn, max_stdfn, max_extfn;
344 unsigned int eax, ebx, ecx, edx;
345 char str[GMX_CPUID_STRLEN];
348 /* Find largest standard/extended function input value */
349 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
351 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
355 if (max_extfn >= 0x80000005)
357 /* Get CPU brand string */
358 for (fn = 0x80000002; fn < 0x80000005; fn++)
360 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
362 memcpy(p+4, &ebx, 4);
363 memcpy(p+8, &ecx, 4);
364 memcpy(p+12, &edx, 4);
369 /* Remove empty initial space */
371 while (isspace(*(p)))
375 strncpy(cpuid->brand, p, GMX_CPUID_STRLEN);
379 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_STRLEN);
382 /* Find basic CPU properties */
385 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
387 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
388 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
389 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
390 cpuid->stepping = (eax & 0x0000000F);
392 /* Feature flags common to AMD and intel */
393 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
394 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
395 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
396 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
397 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
398 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
399 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
400 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
401 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
402 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
403 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
404 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
406 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
407 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
408 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
409 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
410 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
411 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
412 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
413 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
414 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
420 cpuid->stepping = -1;
423 if (max_extfn >= 0x80000001)
425 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
426 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
427 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
428 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
431 if (max_extfn >= 0x80000007)
433 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
434 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
439 /* This routine returns the number of unique different elements found in the array,
440 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
441 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
442 * number of unique elements.
445 cpuid_renumber_elements(int *data, int n)
448 int i, j, nunique, found;
450 unique = malloc(sizeof(int)*n);
453 for (i = 0; i < n; i++)
455 for (j = 0, found = 0; j < nunique && !found; j++)
457 found = (data[i] == unique[j]);
461 /* Insert in sorted order! */
462 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
464 unique[j] = unique[j-1];
470 for (i = 0; i < n; i++)
472 for (j = 0; j < nunique; j++)
474 if (data[i] == unique[j])
484 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
486 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
487 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
488 * we know is that the part for each thread/core/package is unique, and how many bits are
489 * reserved for that part.
490 * This routine does internal renumbering so we get continuous indices, and also
491 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
492 * Returns: 0 on success, non-zero on failure.
495 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
498 int hwthread_mask, core_mask_after_shift;
500 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
501 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
502 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
503 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
505 hwthread_mask = (1 << hwthread_bits) - 1;
506 core_mask_after_shift = (1 << core_bits) - 1;
508 for (i = 0; i < cpuid->nproc; i++)
510 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
511 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
512 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
515 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
516 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
517 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
519 /* now check for consistency */
520 if ( (cpuid->npackages * cpuid->ncores_per_package *
521 cpuid->nhwthreads_per_core) != cpuid->nproc)
523 /* the packages/cores-per-package/hwthreads-per-core counts are
528 /* Create a locality order array, i.e. first all resources in package0, which in turn
529 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
532 for (i = 0; i < cpuid->nproc; i++)
534 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
535 cpuid->locality_order[idx] = i;
541 /* Detection of AMD-specific CPU features */
543 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
545 int max_stdfn, max_extfn, ret;
546 unsigned int eax, ebx, ecx, edx;
547 int hwthread_bits, core_bits;
550 cpuid_check_common_x86(cpuid);
552 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
555 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
558 if (max_extfn >= 0x80000001)
560 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
562 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
563 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
564 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
565 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
568 /* Query APIC information on AMD */
569 if (max_extfn >= 0x80000008)
571 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
574 cpu_set_t cpuset, save_cpuset;
575 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
576 apic_id = malloc(sizeof(int)*cpuid->nproc);
577 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
578 /* Get APIC id from each core */
580 for (i = 0; i < cpuid->nproc; i++)
583 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
584 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
585 apic_id[i] = ebx >> 24;
588 /* Reset affinity to the value it had when calling this routine */
589 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
590 #define CPUID_HAVE_APIC
591 #elif defined GMX_NATIVE_WINDOWS
595 unsigned int save_affinity, affinity;
596 GetSystemInfo( &sysinfo );
597 cpuid->nproc = sysinfo.dwNumberOfProcessors;
598 apic_id = malloc(sizeof(int)*cpuid->nproc);
599 /* Get previous affinity mask */
600 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
601 for (i = 0; i < cpuid->nproc; i++)
603 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
605 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
606 apic_id[i] = ebx >> 24;
608 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
609 #define CPUID_HAVE_APIC
611 #ifdef CPUID_HAVE_APIC
612 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
614 /* Get number of core bits in apic ID - try modern extended method first */
615 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
616 core_bits = (ecx >> 12) & 0xf;
619 /* Legacy method for old single/dual core AMD CPUs */
621 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
626 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
628 cpuid->have_cpu_topology = (ret == 0);
634 /* Detection of Intel-specific CPU features */
636 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
638 unsigned int max_stdfn, max_extfn, ret;
639 unsigned int eax, ebx, ecx, edx;
640 unsigned int max_logical_cores, max_physical_cores;
641 int hwthread_bits, core_bits;
644 cpuid_check_common_x86(cpuid);
646 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
649 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
654 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
655 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
656 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
657 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
658 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
663 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
664 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
667 /* Check whether Hyper-Threading is enabled, not only supported */
668 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
670 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
671 max_logical_cores = (ebx >> 16) & 0x0FF;
672 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
673 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
675 /* Clear HTT flag if we only have 1 logical core per physical */
676 if (max_logical_cores/max_physical_cores < 2)
678 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
682 if (max_stdfn >= 0xB)
684 /* Query x2 APIC information from cores */
685 #if (defined HAVE_SCHED_AFFINITY && defined HAVE_SYSCONF && defined __linux__)
688 cpu_set_t cpuset, save_cpuset;
689 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
690 apic_id = malloc(sizeof(int)*cpuid->nproc);
691 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
692 /* Get x2APIC ID from each hardware thread */
694 for (i = 0; i < cpuid->nproc; i++)
697 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
698 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
702 /* Reset affinity to the value it had when calling this routine */
703 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
704 #define CPUID_HAVE_APIC
705 #elif defined GMX_NATIVE_WINDOWS
709 unsigned int save_affinity, affinity;
710 GetSystemInfo( &sysinfo );
711 cpuid->nproc = sysinfo.dwNumberOfProcessors;
712 apic_id = malloc(sizeof(int)*cpuid->nproc);
713 /* Get previous affinity mask */
714 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
715 for (i = 0; i < cpuid->nproc; i++)
717 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
719 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
722 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
723 #define CPUID_HAVE_APIC
725 #ifdef CPUID_HAVE_APIC
726 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
727 hwthread_bits = eax & 0x1F;
728 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
729 core_bits = (eax & 0x1F) - hwthread_bits;
730 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
732 cpuid->have_cpu_topology = (ret == 0);
737 #endif /* GMX_CPUID_X86 */
742 chomp_substring_before_colon(const char *in, char *s, int maxlength)
745 strncpy(s, in, maxlength);
750 while (isspace(*(--p)) && (p >= s))
762 chomp_substring_after_colon(const char *in, char *s, int maxlength)
765 if ( (p = strchr(in, ':')) != NULL)
772 strncpy(s, p, maxlength);
774 while (isspace(*(--p)) && (p >= s))
786 cpuid_check_arm(gmx_cpuid_t cpuid)
788 #if defined(__linux__) || defined(__linux)
790 char buffer[GMX_CPUID_STRLEN], buffer2[GMX_CPUID_STRLEN], buffer3[GMX_CPUID_STRLEN];
792 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
794 while ( (fgets(buffer, sizeof(buffer), fp) != NULL))
796 chomp_substring_before_colon(buffer, buffer2, GMX_CPUID_STRLEN);
797 chomp_substring_after_colon(buffer, buffer3, GMX_CPUID_STRLEN);
799 if (!strcmp(buffer2, "Processor"))
801 strncpy(cpuid->brand, buffer3, GMX_CPUID_STRLEN);
803 else if (!strcmp(buffer2, "CPU architecture"))
805 cpuid->family = strtol(buffer3, NULL, 10);
806 if (!strcmp(buffer3, "AArch64"))
811 else if (!strcmp(buffer2, "CPU part"))
813 cpuid->model = strtol(buffer3, NULL, 16);
815 else if (!strcmp(buffer2, "CPU revision"))
817 cpuid->stepping = strtol(buffer3, NULL, 10);
819 else if (!strcmp(buffer2, "Features") && strstr(buffer3, "neon"))
821 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON] = 1;
823 else if (!strcmp(buffer2, "Features") && strstr(buffer3, "asimd"))
825 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON_ASIMD] = 1;
832 /* Strange 64-bit non-linux platform. However, since NEON ASIMD is present on all
833 * implementations of AArch64 this far, we assume it is present for now.
835 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON_ASIMD] = 1;
837 /* Strange 32-bit non-linux platform. We cannot assume that neon is present. */
838 cpuid->feature[GMX_CPUID_FEATURE_ARM_NEON] = 0;
845 /* Try to find the vendor of the current CPU, so we know what specific
846 * detection routine to call.
848 static enum gmx_cpuid_vendor
849 cpuid_check_vendor(void)
851 enum gmx_cpuid_vendor i, vendor;
852 /* Register data used on x86 */
853 unsigned int eax, ebx, ecx, edx;
854 char vendorstring[13];
856 char buffer[GMX_CPUID_STRLEN];
857 char before_colon[GMX_CPUID_STRLEN];
858 char after_colon[GMX_CPUID_STRLEN];
860 /* Set default first */
861 vendor = GMX_CPUID_VENDOR_UNKNOWN;
864 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
866 memcpy(vendorstring, &ebx, 4);
867 memcpy(vendorstring+4, &edx, 4);
868 memcpy(vendorstring+8, &ecx, 4);
870 vendorstring[12] = '\0';
872 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
874 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
879 #elif defined(__linux__) || defined(__linux)
880 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
881 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
883 while ( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer, sizeof(buffer), fp) != NULL))
885 chomp_substring_before_colon(buffer, before_colon, sizeof(before_colon));
886 /* Intel/AMD use "vendor_id", IBM "vendor"(?) or "model". Fujitsu "manufacture".
887 * On ARM there does not seem to be a vendor, but ARM or AArch64 is listed in the Processor string.
888 * Add others if you have them!
890 if (!strcmp(before_colon, "vendor_id")
891 || !strcmp(before_colon, "vendor")
892 || !strcmp(before_colon, "manufacture")
893 || !strcmp(before_colon, "model")
894 || !strcmp(before_colon, "Processor"))
896 chomp_substring_after_colon(buffer, after_colon, sizeof(after_colon));
897 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
899 /* Be liberal and accept if we find the vendor
900 * string (or alternative string) anywhere. Using
901 * strcasestr() would be non-portable. */
902 if (strstr(after_colon, gmx_cpuid_vendor_string[i])
903 || strstr(after_colon, gmx_cpuid_vendor_string_alternative[i]))
912 #elif defined(__arm__) || defined (__arm) || defined(__aarch64__)
913 /* If we are using ARM on something that is not linux we have to trust the compiler,
914 * and we cannot get the extra info that might be present in /proc/cpuinfo.
916 vendor = GMX_CPUID_VENDOR_ARM;
924 gmx_cpuid_topology(gmx_cpuid_t cpuid,
927 int * ncores_per_package,
928 int * nhwthreads_per_core,
929 const int ** package_id,
930 const int ** core_id,
931 const int ** hwthread_id,
932 const int ** locality_order)
936 if (cpuid->have_cpu_topology)
938 *nprocessors = cpuid->nproc;
939 *npackages = cpuid->npackages;
940 *ncores_per_package = cpuid->ncores_per_package;
941 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
942 *package_id = cpuid->package_id;
943 *core_id = cpuid->core_id;
944 *hwthread_id = cpuid->hwthread_id;
945 *locality_order = cpuid->locality_order;
956 enum gmx_cpuid_x86_smt
957 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
959 enum gmx_cpuid_x86_smt rc;
961 if (cpuid->have_cpu_topology)
963 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
965 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
967 rc = GMX_CPUID_X86_SMT_DISABLED;
971 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
978 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
983 char buffer[GMX_CPUID_STRLEN], buffer2[GMX_CPUID_STRLEN];
986 cpuid = malloc(sizeof(*cpuid));
990 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
992 cpuid->feature[i] = 0;
995 cpuid->have_cpu_topology = 0;
997 cpuid->npackages = 0;
998 cpuid->ncores_per_package = 0;
999 cpuid->nhwthreads_per_core = 0;
1000 cpuid->package_id = NULL;
1001 cpuid->core_id = NULL;
1002 cpuid->hwthread_id = NULL;
1003 cpuid->locality_order = NULL;
1005 cpuid->vendor = cpuid_check_vendor();
1007 switch (cpuid->vendor)
1009 #ifdef GMX_CPUID_X86
1010 case GMX_CPUID_VENDOR_INTEL:
1011 cpuid_check_intel_x86(cpuid);
1013 case GMX_CPUID_VENDOR_AMD:
1014 cpuid_check_amd_x86(cpuid);
1017 case GMX_CPUID_VENDOR_ARM:
1018 cpuid_check_arm(cpuid);
1022 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_STRLEN);
1023 #if defined(__linux__) || defined(__linux)
1024 /* General Linux. Try to get CPU type from /proc/cpuinfo */
1025 if ( (fp = fopen("/proc/cpuinfo", "r")) != NULL)
1028 while ( (found_brand == 0) && (fgets(buffer, sizeof(buffer), fp) != NULL))
1030 chomp_substring_before_colon(buffer, buffer2, sizeof(buffer2));
1031 /* Intel uses "model name", Fujitsu and IBM "cpu". */
1032 if (!strcmp(buffer2, "model name") || !strcmp(buffer2, "cpu"))
1034 chomp_substring_after_colon(buffer, cpuid->brand, GMX_CPUID_STRLEN);
1043 cpuid->stepping = 0;
1045 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1047 cpuid->feature[i] = 0;
1049 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
1058 gmx_cpuid_done (gmx_cpuid_t cpuid)
1065 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
1071 enum gmx_cpuid_feature feature;
1077 "Family: %2d Model: %2d Stepping: %2d\n"
1079 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1080 gmx_cpuid_brand(cpuid),
1081 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1086 "Family: %2d Model: %2d Stepping: %2d\n"
1088 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1089 gmx_cpuid_brand(cpuid),
1090 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1098 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
1100 if (gmx_cpuid_feature(cpuid, feature) == 1)
1103 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1105 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1114 _snprintf(str, n, "\n");
1116 snprintf(str, n, "\n");
1126 gmx_cpuid_simd_suggest (gmx_cpuid_t cpuid)
1128 enum gmx_cpuid_simd tmpsimd;
1130 tmpsimd = GMX_CPUID_SIMD_NONE;
1132 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1134 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX2))
1136 tmpsimd = GMX_CPUID_SIMD_X86_AVX2_256;
1138 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1140 tmpsimd = GMX_CPUID_SIMD_X86_AVX_256;
1142 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1144 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1146 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1148 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1151 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1153 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1155 tmpsimd = GMX_CPUID_SIMD_X86_AVX_128_FMA;
1157 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1159 tmpsimd = GMX_CPUID_SIMD_X86_SSE4_1;
1161 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1163 tmpsimd = GMX_CPUID_SIMD_X86_SSE2;
1166 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_FUJITSU)
1168 if (strstr(gmx_cpuid_brand(cpuid), "SPARC64"))
1170 tmpsimd = GMX_CPUID_SIMD_SPARC64_HPC_ACE;
1173 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_IBM)
1175 if (strstr(gmx_cpuid_brand(cpuid), "A2"))
1177 tmpsimd = GMX_CPUID_SIMD_IBM_QPX;
1180 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_ARM)
1182 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_ARM_NEON_ASIMD))
1184 tmpsimd = GMX_CPUID_SIMD_ARM_NEON_ASIMD;
1186 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_ARM_NEON))
1188 tmpsimd = GMX_CPUID_SIMD_ARM_NEON;
1197 gmx_cpuid_simd_check(gmx_cpuid_t cpuid,
1199 int print_to_stderr)
1203 enum gmx_cpuid_simd simd;
1205 simd = gmx_cpuid_simd_suggest(cpuid);
1207 rc = (simd != compiled_simd);
1209 gmx_cpuid_formatstring(cpuid, str, 1023);
1215 "\nDetecting CPU SIMD instructions.\nPresent hardware specification:\n"
1217 "SIMD instructions most likely to fit this hardware: %s\n"
1218 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1220 gmx_cpuid_simd_string[simd],
1221 gmx_cpuid_simd_string[compiled_simd]);
1228 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1229 "SIMD instructions most likely to fit this hardware: %s\n"
1230 "SIMD instructions selected at GROMACS compile time: %s\n\n",
1231 gmx_cpuid_simd_string[simd],
1232 gmx_cpuid_simd_string[compiled_simd]);
1234 if (print_to_stderr)
1236 fprintf(stderr, "Compiled SIMD instructions: %s (Gromacs could use %s on this machine, which is better)\n",
1237 gmx_cpuid_simd_string[compiled_simd],
1238 gmx_cpuid_simd_string[simd]);
1245 #ifdef GMX_CPUID_STANDALONE
1246 /* Stand-alone program to enable queries of CPU features from Cmake.
1247 * Note that you need to check inline ASM capabilities before compiling and set
1248 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1251 main(int argc, char **argv)
1254 enum gmx_cpuid_simd simd;
1260 "Usage:\n\n%s [flags]\n\n"
1261 "Available flags:\n"
1262 "-vendor Print CPU vendor.\n"
1263 "-brand Print CPU brand string.\n"
1264 "-family Print CPU family version.\n"
1265 "-model Print CPU model version.\n"
1266 "-stepping Print CPU stepping version.\n"
1267 "-features Print CPU feature flags.\n"
1268 "-simd Print suggested GROMACS SIMD instructions.\n",
1273 gmx_cpuid_init(&cpuid);
1275 if (!strncmp(argv[1], "-vendor", 3))
1277 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1279 else if (!strncmp(argv[1], "-brand", 3))
1281 printf("%s\n", cpuid->brand);
1283 else if (!strncmp(argv[1], "-family", 3))
1285 printf("%d\n", cpuid->family);
1287 else if (!strncmp(argv[1], "-model", 3))
1289 printf("%d\n", cpuid->model);
1291 else if (!strncmp(argv[1], "-stepping", 3))
1293 printf("%d\n", cpuid->stepping);
1295 else if (!strncmp(argv[1], "-features", 3))
1298 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1300 if (cpuid->feature[i] == 1)
1306 printf("%s", gmx_cpuid_feature_string[i]);
1311 else if (!strncmp(argv[1], "-simd", 3))
1313 simd = gmx_cpuid_simd_suggest(cpuid);
1314 fprintf(stdout, "%s\n", gmx_cpuid_simd_string[simd]);
1317 gmx_cpuid_done(cpuid);