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49 /* MSVC definition for __cpuid() */
51 /* sysinfo functions */
55 /* sysconf() definition */
59 #include "gmx_cpuid.h"
63 /* For convenience, and to enable configure-time invocation, we keep all architectures
64 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
66 #if defined (__i386__) || defined (__x86_64__) || defined (_M_IX86) || defined (_M_X64)
67 /* OK, it is x86, but can we execute cpuid? */
68 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER==1500 & _MSC_FULL_VER >= 150030729)))
69 # define GMX_CPUID_X86
73 /* Global constant character strings corresponding to our enumerated types */
75 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
86 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
126 gmx_cpuid_acceleration_string[GMX_CPUID_NACCELERATIONS] =
137 /* Max length of brand string */
138 #define GMX_CPUID_BRAND_MAXLEN 256
141 /* Contents of the abstract datatype */
144 enum gmx_cpuid_vendor vendor;
145 char brand[GMX_CPUID_BRAND_MAXLEN];
149 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
150 char feature[GMX_CPUID_NFEATURES];
152 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
153 * operating systems and sometimes even settings. For most other architectures you can likely just check
154 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
156 int have_cpu_topology;
157 int nproc; /* total number of logical processors from OS */
159 int ncores_per_package;
160 int nhwthreads_per_core;
162 int * core_id; /* Local core id in each package */
163 int * hwthread_id; /* Local hwthread id in each core */
164 int * locality_order; /* Processor indices sorted in locality order */
168 /* Simple routines to access the data structure. The initialization routine is
169 * further down since that needs to call other static routines in this file.
171 enum gmx_cpuid_vendor
172 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
174 return cpuid->vendor;
179 gmx_cpuid_brand (gmx_cpuid_t cpuid)
185 gmx_cpuid_family (gmx_cpuid_t cpuid)
187 return cpuid->family;
191 gmx_cpuid_model (gmx_cpuid_t cpuid)
197 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
199 return cpuid->stepping;
203 gmx_cpuid_feature (gmx_cpuid_t cpuid,
204 enum gmx_cpuid_feature feature)
206 return (cpuid->feature[feature] != 0);
212 /* What type of acceleration was compiled in, if any?
213 * This is set from Cmake. Note that the SSE2 and SSE4_1 macros are set for
214 * AVX too, so it is important that they appear last in the list.
216 #ifdef GMX_X86_AVX_256
218 enum gmx_cpuid_acceleration
219 compiled_acc = GMX_CPUID_ACCELERATION_X86_AVX_256;
220 #elif defined GMX_X86_AVX_128_FMA
222 enum gmx_cpuid_acceleration
223 compiled_acc = GMX_CPUID_ACCELERATION_X86_AVX_128_FMA;
224 #elif defined GMX_X86_SSE4_1
226 enum gmx_cpuid_acceleration
227 compiled_acc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
228 #elif defined GMX_X86_SSE2
230 enum gmx_cpuid_acceleration
231 compiled_acc = GMX_CPUID_ACCELERATION_X86_SSE2;
232 #elif defined GMX_CPU_ACCELERATION_SPARC64_HPC_ACE
234 enum gmx_cpuid_acceleration
235 compiled_acc = GMX_CPUID_ACCELERATION_SPARC64_HPC_ACE;
238 enum gmx_cpuid_acceleration
239 compiled_acc = GMX_CPUID_ACCELERATION_NONE;
245 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
246 * contents of register output is returned. See Intel/AMD docs for details.
248 * This version supports extended information where we can also have an input
249 * value in the ecx register. This is ignored for most levels, but some of them
250 * (e.g. level 0xB on Intel) use it.
253 execute_x86cpuid(unsigned int level,
262 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
263 * if the compiler handles GNU-style inline assembly.
266 #if (defined _MSC_VER)
269 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
270 /* MSVC 9.0 SP1 or later */
271 __cpuidex(CPUInfo, level, ecxval);
274 __cpuid(CPUInfo, level);
275 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
276 rc = (ecxval > 0) ? -1 : 0;
283 #elif (defined GMX_X86_GCC_INLINE_ASM)
284 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
285 * but there might be more options added in the future.
291 #if defined(__i386__) && defined(__PIC__)
292 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
293 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
295 "xchgl %%ebx, %1 \n\t"
296 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
298 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
299 __asm__ __volatile__ ("cpuid \n\t"
300 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
305 * Apparently this is an x86 platform where we don't know how to call cpuid.
307 * This is REALLY bad, since we will lose all Gromacs acceleration.
320 /* Identify CPU features common to Intel & AMD - mainly brand string,
321 * version and some features. Vendor has already been detected outside this.
324 cpuid_check_common_x86(gmx_cpuid_t cpuid)
326 int fn, max_stdfn, max_extfn;
327 unsigned int eax, ebx, ecx, edx;
328 char str[GMX_CPUID_BRAND_MAXLEN];
331 /* Find largest standard/extended function input value */
332 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
334 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
338 if (max_extfn >= 0x80000005)
340 /* Get CPU brand string */
341 for (fn = 0x80000002; fn < 0x80000005; fn++)
343 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
345 memcpy(p+4, &ebx, 4);
346 memcpy(p+8, &ecx, 4);
347 memcpy(p+12, &edx, 4);
352 /* Remove empty initial space */
354 while (isspace(*(p)))
358 strncpy(cpuid->brand, p, GMX_CPUID_BRAND_MAXLEN);
362 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
365 /* Find basic CPU properties */
368 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
370 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
371 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
372 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
373 cpuid->stepping = (eax & 0x0000000F);
375 /* Feature flags common to AMD and intel */
376 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
377 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
378 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
379 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
380 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
381 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
382 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
383 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
384 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
385 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
386 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
387 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
389 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
390 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
391 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
392 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
393 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
394 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
395 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
396 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
397 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
403 cpuid->stepping = -1;
406 if (max_extfn >= 0x80000001)
408 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
409 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
410 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
411 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
414 if (max_extfn >= 0x80000007)
416 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
417 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
422 /* This routine returns the number of unique different elements found in the array,
423 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
424 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
425 * number of unique elements.
428 cpuid_renumber_elements(int *data, int n)
431 int i, j, nunique, found;
433 unique = malloc(sizeof(int)*n);
436 for (i = 0; i < n; i++)
438 for (j = 0, found = 0; j < nunique && !found; j++)
440 found = (data[i] == unique[j]);
444 /* Insert in sorted order! */
445 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
447 unique[j] = unique[j-1];
453 for (i = 0; i < n; i++)
455 for (j = 0; j < nunique; j++)
457 if (data[i] == unique[j])
466 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
468 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
469 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
470 * we know is that the part for each thread/core/package is unique, and how many bits are
471 * reserved for that part.
472 * This routine does internal renumbering so we get continuous indices, and also
473 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
476 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
479 int hwthread_mask, core_mask_after_shift;
481 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
482 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
483 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
484 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
486 hwthread_mask = (1 << hwthread_bits) - 1;
487 core_mask_after_shift = (1 << core_bits) - 1;
489 for (i = 0; i < cpuid->nproc; i++)
491 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
492 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
493 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
496 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
497 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
498 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
500 /* Create a locality order array, i.e. first all resources in package0, which in turn
501 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
503 for (i = 0; i < cpuid->nproc; i++)
505 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
506 cpuid->locality_order[idx] = i;
511 /* Detection of AMD-specific CPU features */
513 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
515 int max_stdfn, max_extfn;
516 unsigned int eax, ebx, ecx, edx;
517 int hwthread_bits, core_bits;
520 cpuid_check_common_x86(cpuid);
522 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
525 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
528 if (max_extfn >= 0x80000001)
530 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
532 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
533 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
534 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
535 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
538 /* Query APIC information on AMD */
539 if (max_extfn >= 0x80000008)
541 #if (defined HAVE_SCHED_H && defined HAVE_SCHED_SETAFFINITY && defined HAVE_SYSCONF && defined __linux__)
544 cpu_set_t cpuset, save_cpuset;
545 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
546 apic_id = malloc(sizeof(int)*cpuid->nproc);
547 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
548 /* Get APIC id from each core */
550 for (i = 0; i < cpuid->nproc; i++)
553 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
554 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
555 apic_id[i] = ebx >> 24;
558 /* Reset affinity to the value it had when calling this routine */
559 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
560 #define CPUID_HAVE_APIC
561 #elif defined GMX_NATIVE_WINDOWS
565 unsigned int save_affinity, affinity;
566 GetSystemInfo( &sysinfo );
567 cpuid->nproc = sysinfo.dwNumberOfProcessors;
568 apic_id = malloc(sizeof(int)*cpuid->nproc);
569 /* Get previous affinity mask */
570 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
571 for (i = 0; i < cpuid->nproc; i++)
573 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
575 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
576 apic_id[i] = ebx >> 24;
578 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
579 #define CPUID_HAVE_APIC
581 #ifdef CPUID_HAVE_APIC
582 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
584 /* Get number of core bits in apic ID - try modern extended method first */
585 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
586 core_bits = (ecx >> 12) & 0xf;
589 /* Legacy method for old single/dual core AMD CPUs */
591 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
596 cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits, hwthread_bits);
597 cpuid->have_cpu_topology = 1;
603 /* Detection of Intel-specific CPU features */
605 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
607 unsigned int max_stdfn, max_extfn;
608 unsigned int eax, ebx, ecx, edx;
609 unsigned int max_logical_cores, max_physical_cores;
610 int hwthread_bits, core_bits;
613 cpuid_check_common_x86(cpuid);
615 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
618 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
623 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
624 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
625 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
626 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
627 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
632 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
633 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
636 /* Check whether Hyper-Threading is enabled, not only supported */
637 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
639 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
640 max_logical_cores = (ebx >> 16) & 0x0FF;
641 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
642 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
644 /* Clear HTT flag if we only have 1 logical core per physical */
645 if (max_logical_cores/max_physical_cores < 2)
647 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
651 if (max_stdfn >= 0xB)
653 /* Query x2 APIC information from cores */
654 #if (defined HAVE_SCHED_H && defined HAVE_SCHED_SETAFFINITY && defined HAVE_SYSCONF && defined __linux__)
657 cpu_set_t cpuset, save_cpuset;
658 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
659 apic_id = malloc(sizeof(int)*cpuid->nproc);
660 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
661 /* Get x2APIC ID from each hardware thread */
663 for (i = 0; i < cpuid->nproc; i++)
666 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
667 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
671 /* Reset affinity to the value it had when calling this routine */
672 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
673 #define CPUID_HAVE_APIC
674 #elif defined GMX_NATIVE_WINDOWS
678 unsigned int save_affinity, affinity;
679 GetSystemInfo( &sysinfo );
680 cpuid->nproc = sysinfo.dwNumberOfProcessors;
681 apic_id = malloc(sizeof(int)*cpuid->nproc);
682 /* Get previous affinity mask */
683 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
684 for (i = 0; i < cpuid->nproc; i++)
686 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
688 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
691 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
692 #define CPUID_HAVE_APIC
694 #ifdef CPUID_HAVE_APIC
695 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
696 hwthread_bits = eax & 0x1F;
697 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
698 core_bits = (eax & 0x1F) - hwthread_bits;
699 cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits, hwthread_bits);
700 cpuid->have_cpu_topology = 1;
705 #endif /* GMX_CPUID_X86 */
711 chomp_substring_before_colon(const char *in, char *s, int maxlength)
714 strncpy(s,in,maxlength);
719 while(isspace(*(--p)) && (p>=s))
731 chomp_substring_after_colon(const char *in, char *s, int maxlength)
734 if( (p = strchr(in,':'))!=NULL)
737 while(isspace(*p)) p++;
738 strncpy(s,p,maxlength);
740 while(isspace(*(--p)) && (p>=s))
751 /* Try to find the vendor of the current CPU, so we know what specific
752 * detection routine to call.
754 static enum gmx_cpuid_vendor
755 cpuid_check_vendor(void)
757 enum gmx_cpuid_vendor i, vendor;
758 /* Register data used on x86 */
759 unsigned int eax, ebx, ecx, edx;
760 char vendorstring[13];
762 char buffer[255],buffer2[255];
764 /* Set default first */
765 vendor = GMX_CPUID_VENDOR_UNKNOWN;
768 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
770 memcpy(vendorstring, &ebx, 4);
771 memcpy(vendorstring+4, &edx, 4);
772 memcpy(vendorstring+8, &ecx, 4);
774 vendorstring[12] = '\0';
776 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
778 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
783 #elif defined(__linux__) || defined(__linux)
784 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
785 if( (fp = fopen("/proc/cpuinfo","r")) != NULL)
787 while( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer,sizeof(buffer),fp) != NULL))
789 chomp_substring_before_colon(buffer,buffer2,sizeof(buffer2));
790 /* Intel/AMD use "vendor_id", IBM "vendor". Fujitsu "manufacture". Add others if you have them! */
791 if( !strcmp(buffer2,"vendor_id") || !strcmp(buffer2,"vendor") || !strcmp(buffer2,"manufacture") )
793 chomp_substring_after_colon(buffer,buffer2,sizeof(buffer2));
794 for(i=GMX_CPUID_VENDOR_UNKNOWN; i<GMX_CPUID_NVENDORS; i++)
796 /* Be liberal and accept if we find the vendor anywhere in string */
797 if(strstr(buffer2,gmx_cpuid_vendor_string[i]))
807 vendor = GMX_CPUID_VENDOR_UNKNOWN;
816 gmx_cpuid_topology(gmx_cpuid_t cpuid,
819 int * ncores_per_package,
820 int * nhwthreads_per_core,
821 const int ** package_id,
822 const int ** core_id,
823 const int ** hwthread_id,
824 const int ** locality_order)
828 if (cpuid->have_cpu_topology)
830 *nprocessors = cpuid->nproc;
831 *npackages = cpuid->npackages;
832 *ncores_per_package = cpuid->ncores_per_package;
833 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
834 *package_id = cpuid->package_id;
835 *core_id = cpuid->core_id;
836 *hwthread_id = cpuid->hwthread_id;
837 *locality_order = cpuid->locality_order;
848 enum gmx_cpuid_x86_smt
849 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
851 enum gmx_cpuid_x86_smt rc;
853 if (cpuid->have_cpu_topology)
855 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
857 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
859 rc = GMX_CPUID_X86_SMT_DISABLED;
863 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
870 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
875 char buffer[255],buffer2[255];
878 cpuid = malloc(sizeof(*cpuid));
882 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
884 cpuid->feature[i] = 0;
887 cpuid->have_cpu_topology = 0;
889 cpuid->npackages = 0;
890 cpuid->ncores_per_package = 0;
891 cpuid->nhwthreads_per_core = 0;
892 cpuid->package_id = NULL;
893 cpuid->core_id = NULL;
894 cpuid->hwthread_id = NULL;
895 cpuid->locality_order = NULL;
897 cpuid->vendor = cpuid_check_vendor();
899 switch (cpuid->vendor)
902 case GMX_CPUID_VENDOR_INTEL:
903 cpuid_check_intel_x86(cpuid);
905 case GMX_CPUID_VENDOR_AMD:
906 cpuid_check_amd_x86(cpuid);
911 strncpy(cpuid->brand,"Unknown CPU brand",GMX_CPUID_BRAND_MAXLEN);
912 #if defined(__linux__) || defined(__linux)
913 /* General Linux. Try to get CPU type from /proc/cpuinfo */
914 if( (fp = fopen("/proc/cpuinfo","r")) != NULL)
917 while( (found_brand==0) && (fgets(buffer,sizeof(buffer),fp) !=NULL))
919 chomp_substring_before_colon(buffer,buffer2,sizeof(buffer2));
920 /* Intel uses "model name", Fujitsu and IBM "cpu". */
921 if( !strcmp(buffer2,"model name") || !strcmp(buffer2,"cpu"))
923 chomp_substring_after_colon(buffer,cpuid->brand,GMX_CPUID_BRAND_MAXLEN);
934 for(i=0; i<GMX_CPUID_NFEATURES; i++)
938 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
947 gmx_cpuid_done (gmx_cpuid_t cpuid)
954 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
960 enum gmx_cpuid_feature feature;
966 "Family: %2d Model: %2d Stepping: %2d\n"
968 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
969 gmx_cpuid_brand(cpuid),
970 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
975 "Family: %2d Model: %2d Stepping: %2d\n"
977 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
978 gmx_cpuid_brand(cpuid),
979 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
987 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
989 if (gmx_cpuid_feature(cpuid, feature) == 1)
992 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
994 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1003 _snprintf(str, n, "\n");
1005 snprintf(str, n, "\n");
1014 enum gmx_cpuid_acceleration
1015 gmx_cpuid_acceleration_suggest (gmx_cpuid_t cpuid)
1017 enum gmx_cpuid_acceleration tmpacc;
1019 tmpacc = GMX_CPUID_ACCELERATION_NONE;
1021 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1023 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1025 tmpacc = GMX_CPUID_ACCELERATION_X86_AVX_256;
1027 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1029 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
1031 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1033 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE2;
1036 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1038 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1040 tmpacc = GMX_CPUID_ACCELERATION_X86_AVX_128_FMA;
1042 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1044 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
1046 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1048 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE2;
1051 else if(gmx_cpuid_vendor(cpuid)==GMX_CPUID_VENDOR_FUJITSU)
1053 if(strstr(gmx_cpuid_brand(cpuid),"SPARC64"))
1055 tmpacc = GMX_CPUID_ACCELERATION_SPARC64_HPC_ACE;
1064 gmx_cpuid_acceleration_check(gmx_cpuid_t cpuid,
1069 enum gmx_cpuid_acceleration acc;
1071 acc = gmx_cpuid_acceleration_suggest(cpuid);
1073 rc = (acc != compiled_acc);
1075 gmx_cpuid_formatstring(cpuid, str, 1023);
1081 "\nDetecting CPU-specific acceleration.\nPresent hardware specification:\n"
1083 "Acceleration most likely to fit this hardware: %s\n"
1084 "Acceleration selected at GROMACS compile time: %s\n\n",
1086 gmx_cpuid_acceleration_string[acc],
1087 gmx_cpuid_acceleration_string[compiled_acc]);
1094 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1095 "Acceleration most likely to fit this hardware: %s\n"
1096 "Acceleration selected at GROMACS compile time: %s\n\n",
1097 gmx_cpuid_acceleration_string[acc],
1098 gmx_cpuid_acceleration_string[compiled_acc]);
1100 printf("Compiled acceleration: %s (Gromacs could use %s on this machine, which is better)\n",
1101 gmx_cpuid_acceleration_string[compiled_acc],
1102 gmx_cpuid_acceleration_string[acc]);
1108 #ifdef GMX_CPUID_STANDALONE
1109 /* Stand-alone program to enable queries of CPU features from Cmake.
1110 * Note that you need to check inline ASM capabilities before compiling and set
1111 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1114 main(int argc, char **argv)
1117 enum gmx_cpuid_acceleration acc;
1123 "Usage:\n\n%s [flags]\n\n"
1124 "Available flags:\n"
1125 "-vendor Print CPU vendor.\n"
1126 "-brand Print CPU brand string.\n"
1127 "-family Print CPU family version.\n"
1128 "-model Print CPU model version.\n"
1129 "-stepping Print CPU stepping version.\n"
1130 "-features Print CPU feature flags.\n"
1131 "-acceleration Print suggested GROMACS acceleration.\n",
1136 gmx_cpuid_init(&cpuid);
1138 if (!strncmp(argv[1], "-vendor", 3))
1140 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1142 else if (!strncmp(argv[1], "-brand", 3))
1144 printf("%s\n", cpuid->brand);
1146 else if (!strncmp(argv[1], "-family", 3))
1148 printf("%d\n", cpuid->family);
1150 else if (!strncmp(argv[1], "-model", 3))
1152 printf("%d\n", cpuid->model);
1154 else if (!strncmp(argv[1], "-stepping", 3))
1156 printf("%d\n", cpuid->stepping);
1158 else if (!strncmp(argv[1], "-features", 3))
1161 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1163 if (cpuid->feature[i] == 1)
1169 printf("%s", gmx_cpuid_feature_string[i]);
1174 else if (!strncmp(argv[1], "-acceleration", 3))
1176 acc = gmx_cpuid_acceleration_suggest(cpuid);
1177 fprintf(stdout, "%s\n", gmx_cpuid_acceleration_string[acc]);
1180 gmx_cpuid_done(cpuid);