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49 /* MSVC definition for __cpuid() */
51 /* sysinfo functions */
55 /* sysconf() definition */
59 #include "gmx_cpuid.h"
63 /* For convenience, and to enable configure-time invocation, we keep all architectures
64 * in a single file, but to avoid repeated ifdefs we set the overall architecture here.
67 /* OK, it is x86, but can we execute cpuid? */
68 #if defined(GMX_X86_GCC_INLINE_ASM) || ( defined(_MSC_VER) && ( (_MSC_VER > 1500) || (_MSC_VER==1500 & _MSC_FULL_VER >= 150030729)))
69 # define GMX_CPUID_X86
73 /* Global constant character strings corresponding to our enumerated types */
75 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS] =
86 gmx_cpuid_vendor_string_alternative[GMX_CPUID_NVENDORS] =
93 "ibm" /* Used on BlueGene/Q */
97 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES] =
137 gmx_cpuid_acceleration_string[GMX_CPUID_NACCELERATIONS] =
149 /* Max length of brand string */
150 #define GMX_CPUID_BRAND_MAXLEN 256
153 /* Contents of the abstract datatype */
156 enum gmx_cpuid_vendor vendor;
157 char brand[GMX_CPUID_BRAND_MAXLEN];
161 /* Not using gmx_bool here, since this file must be possible to compile without simple.h */
162 char feature[GMX_CPUID_NFEATURES];
164 /* Basic CPU topology information. For x86 this is a bit complicated since the topology differs between
165 * operating systems and sometimes even settings. For most other architectures you can likely just check
166 * the documentation and then write static information to these arrays rather than detecting on-the-fly.
168 int have_cpu_topology;
169 int nproc; /* total number of logical processors from OS */
171 int ncores_per_package;
172 int nhwthreads_per_core;
174 int * core_id; /* Local core id in each package */
175 int * hwthread_id; /* Local hwthread id in each core */
176 int * locality_order; /* Processor indices sorted in locality order */
180 /* Simple routines to access the data structure. The initialization routine is
181 * further down since that needs to call other static routines in this file.
183 enum gmx_cpuid_vendor
184 gmx_cpuid_vendor (gmx_cpuid_t cpuid)
186 return cpuid->vendor;
191 gmx_cpuid_brand (gmx_cpuid_t cpuid)
197 gmx_cpuid_family (gmx_cpuid_t cpuid)
199 return cpuid->family;
203 gmx_cpuid_model (gmx_cpuid_t cpuid)
209 gmx_cpuid_stepping (gmx_cpuid_t cpuid)
211 return cpuid->stepping;
215 gmx_cpuid_feature (gmx_cpuid_t cpuid,
216 enum gmx_cpuid_feature feature)
218 return (cpuid->feature[feature] != 0);
224 /* What type of acceleration was compiled in, if any?
225 * This is set from Cmake. Note that the SSE2 and SSE4_1 macros are set for
226 * AVX too, so it is important that they appear last in the list.
228 #ifdef GMX_X86_AVX_256
230 enum gmx_cpuid_acceleration
231 compiled_acc = GMX_CPUID_ACCELERATION_X86_AVX_256;
232 #elif defined GMX_X86_AVX_128_FMA
234 enum gmx_cpuid_acceleration
235 compiled_acc = GMX_CPUID_ACCELERATION_X86_AVX_128_FMA;
236 #elif defined GMX_X86_SSE4_1
238 enum gmx_cpuid_acceleration
239 compiled_acc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
240 #elif defined GMX_X86_SSE2
242 enum gmx_cpuid_acceleration
243 compiled_acc = GMX_CPUID_ACCELERATION_X86_SSE2;
244 #elif defined GMX_CPU_ACCELERATION_SPARC64_HPC_ACE
246 enum gmx_cpuid_acceleration
247 compiled_acc = GMX_CPUID_ACCELERATION_SPARC64_HPC_ACE;
248 #elif defined GMX_CPU_ACCELERATION_IBM_QPX
250 enum gmx_cpuid_acceleration
251 compiled_acc = GMX_CPUID_ACCELERATION_IBM_QPX;
254 enum gmx_cpuid_acceleration
255 compiled_acc = GMX_CPUID_ACCELERATION_NONE;
261 /* Execute CPUID on x86 class CPUs. level sets function to exec, and the
262 * contents of register output is returned. See Intel/AMD docs for details.
264 * This version supports extended information where we can also have an input
265 * value in the ecx register. This is ignored for most levels, but some of them
266 * (e.g. level 0xB on Intel) use it.
269 execute_x86cpuid(unsigned int level,
278 /* Currently CPUID is only supported (1) if we can use an instruction on MSVC, or (2)
279 * if the compiler handles GNU-style inline assembly.
282 #if (defined _MSC_VER)
285 #if (_MSC_VER > 1500) || (_MSC_VER == 1500 & _MSC_FULL_VER >= 150030729)
286 /* MSVC 9.0 SP1 or later */
287 __cpuidex(CPUInfo, level, ecxval);
290 __cpuid(CPUInfo, level);
291 /* Set an error code if the user wanted a non-zero ecxval, since we did not have cpuidex */
292 rc = (ecxval > 0) ? -1 : 0;
299 #elif (defined GMX_X86_GCC_INLINE_ASM)
300 /* for now this means GMX_X86_GCC_INLINE_ASM should be defined,
301 * but there might be more options added in the future.
307 #if defined(__i386__) && defined(__PIC__)
308 /* Avoid clobbering the global offset table in 32-bit pic code (ebx register) */
309 __asm__ __volatile__ ("xchgl %%ebx, %1 \n\t"
311 "xchgl %%ebx, %1 \n\t"
312 : "+a" (*eax), "+r" (*ebx), "+c" (*ecx), "+d" (*edx));
314 /* i386 without PIC, or x86-64. Things are easy and we can clobber any reg we want :-) */
315 __asm__ __volatile__ ("cpuid \n\t"
316 : "+a" (*eax), "+b" (*ebx), "+c" (*ecx), "+d" (*edx));
321 * Apparently this is an x86 platform where we don't know how to call cpuid.
323 * This is REALLY bad, since we will lose all Gromacs acceleration.
336 /* Identify CPU features common to Intel & AMD - mainly brand string,
337 * version and some features. Vendor has already been detected outside this.
340 cpuid_check_common_x86(gmx_cpuid_t cpuid)
342 int fn, max_stdfn, max_extfn;
343 unsigned int eax, ebx, ecx, edx;
344 char str[GMX_CPUID_BRAND_MAXLEN];
347 /* Find largest standard/extended function input value */
348 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
350 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
354 if (max_extfn >= 0x80000005)
356 /* Get CPU brand string */
357 for (fn = 0x80000002; fn < 0x80000005; fn++)
359 execute_x86cpuid(fn, 0, &eax, &ebx, &ecx, &edx);
361 memcpy(p+4, &ebx, 4);
362 memcpy(p+8, &ecx, 4);
363 memcpy(p+12, &edx, 4);
368 /* Remove empty initial space */
370 while (isspace(*(p)))
374 strncpy(cpuid->brand, p, GMX_CPUID_BRAND_MAXLEN);
378 strncpy(cpuid->brand, "Unknown CPU brand", GMX_CPUID_BRAND_MAXLEN);
381 /* Find basic CPU properties */
384 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
386 cpuid->family = ((eax & 0x0FF00000) >> 20) + ((eax & 0x00000F00) >> 8);
387 /* Note that extended model should be shifted left 4, so only shift right 12 iso 16. */
388 cpuid->model = ((eax & 0x000F0000) >> 12) + ((eax & 0x000000F0) >> 4);
389 cpuid->stepping = (eax & 0x0000000F);
391 /* Feature flags common to AMD and intel */
392 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE3] = (ecx & (1 << 0)) != 0;
393 cpuid->feature[GMX_CPUID_FEATURE_X86_PCLMULDQ] = (ecx & (1 << 1)) != 0;
394 cpuid->feature[GMX_CPUID_FEATURE_X86_SSSE3] = (ecx & (1 << 9)) != 0;
395 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA] = (ecx & (1 << 12)) != 0;
396 cpuid->feature[GMX_CPUID_FEATURE_X86_CX16] = (ecx & (1 << 13)) != 0;
397 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_1] = (ecx & (1 << 19)) != 0;
398 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4_2] = (ecx & (1 << 20)) != 0;
399 cpuid->feature[GMX_CPUID_FEATURE_X86_POPCNT] = (ecx & (1 << 23)) != 0;
400 cpuid->feature[GMX_CPUID_FEATURE_X86_AES] = (ecx & (1 << 25)) != 0;
401 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX] = (ecx & (1 << 28)) != 0;
402 cpuid->feature[GMX_CPUID_FEATURE_X86_F16C] = (ecx & (1 << 29)) != 0;
403 cpuid->feature[GMX_CPUID_FEATURE_X86_RDRND] = (ecx & (1 << 30)) != 0;
405 cpuid->feature[GMX_CPUID_FEATURE_X86_PSE] = (edx & (1 << 3)) != 0;
406 cpuid->feature[GMX_CPUID_FEATURE_X86_MSR] = (edx & (1 << 5)) != 0;
407 cpuid->feature[GMX_CPUID_FEATURE_X86_CX8] = (edx & (1 << 8)) != 0;
408 cpuid->feature[GMX_CPUID_FEATURE_X86_APIC] = (edx & (1 << 9)) != 0;
409 cpuid->feature[GMX_CPUID_FEATURE_X86_CMOV] = (edx & (1 << 15)) != 0;
410 cpuid->feature[GMX_CPUID_FEATURE_X86_CLFSH] = (edx & (1 << 19)) != 0;
411 cpuid->feature[GMX_CPUID_FEATURE_X86_MMX] = (edx & (1 << 23)) != 0;
412 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE2] = (edx & (1 << 26)) != 0;
413 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = (edx & (1 << 28)) != 0;
419 cpuid->stepping = -1;
422 if (max_extfn >= 0x80000001)
424 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
425 cpuid->feature[GMX_CPUID_FEATURE_X86_LAHF_LM] = (ecx & (1 << 0)) != 0;
426 cpuid->feature[GMX_CPUID_FEATURE_X86_PDPE1GB] = (edx & (1 << 26)) != 0;
427 cpuid->feature[GMX_CPUID_FEATURE_X86_RDTSCP] = (edx & (1 << 27)) != 0;
430 if (max_extfn >= 0x80000007)
432 execute_x86cpuid(0x80000007, 0, &eax, &ebx, &ecx, &edx);
433 cpuid->feature[GMX_CPUID_FEATURE_X86_NONSTOP_TSC] = (edx & (1 << 8)) != 0;
438 /* This routine returns the number of unique different elements found in the array,
439 * and renumbers these starting from 0. For example, the array {0,1,2,8,9,10,8,9,10,0,1,2}
440 * will be rewritten to {0,1,2,3,4,5,3,4,5,0,1,2}, and it returns 6 for the
441 * number of unique elements.
444 cpuid_renumber_elements(int *data, int n)
447 int i, j, nunique, found;
449 unique = malloc(sizeof(int)*n);
452 for (i = 0; i < n; i++)
454 for (j = 0, found = 0; j < nunique && !found; j++)
456 found = (data[i] == unique[j]);
460 /* Insert in sorted order! */
461 for (j = nunique++; j > 0 && unique[j-1] > data[i]; j--)
463 unique[j] = unique[j-1];
469 for (i = 0; i < n; i++)
471 for (j = 0; j < nunique; j++)
473 if (data[i] == unique[j])
482 /* APIC IDs, or everything you wanted to know about your x86 cores but were afraid to ask...
484 * Raw APIC IDs are unfortunately somewhat dirty. For technical reasons they are assigned
485 * in power-of-2 chunks, and even then there are no guarantees about specific numbers - all
486 * we know is that the part for each thread/core/package is unique, and how many bits are
487 * reserved for that part.
488 * This routine does internal renumbering so we get continuous indices, and also
489 * decodes the actual number of packages,cores-per-package and hwthreads-per-core.
490 * Returns: 0 on success, non-zero on failure.
493 cpuid_x86_decode_apic_id(gmx_cpuid_t cpuid, int *apic_id, int core_bits, int hwthread_bits)
496 int hwthread_mask, core_mask_after_shift;
498 cpuid->hwthread_id = malloc(sizeof(int)*cpuid->nproc);
499 cpuid->core_id = malloc(sizeof(int)*cpuid->nproc);
500 cpuid->package_id = malloc(sizeof(int)*cpuid->nproc);
501 cpuid->locality_order = malloc(sizeof(int)*cpuid->nproc);
503 hwthread_mask = (1 << hwthread_bits) - 1;
504 core_mask_after_shift = (1 << core_bits) - 1;
506 for (i = 0; i < cpuid->nproc; i++)
508 cpuid->hwthread_id[i] = apic_id[i] & hwthread_mask;
509 cpuid->core_id[i] = (apic_id[i] >> hwthread_bits) & core_mask_after_shift;
510 cpuid->package_id[i] = apic_id[i] >> (core_bits + hwthread_bits);
513 cpuid->npackages = cpuid_renumber_elements(cpuid->package_id, cpuid->nproc);
514 cpuid->ncores_per_package = cpuid_renumber_elements(cpuid->core_id, cpuid->nproc);
515 cpuid->nhwthreads_per_core = cpuid_renumber_elements(cpuid->hwthread_id, cpuid->nproc);
517 /* now check for consistency */
518 if ( (cpuid->npackages * cpuid->ncores_per_package *
519 cpuid->nhwthreads_per_core) != cpuid->nproc )
521 /* the packages/cores-per-package/hwthreads-per-core counts are
526 /* Create a locality order array, i.e. first all resources in package0, which in turn
527 * are sorted so we first have all resources in core0, where threads are sorted in order, etc.
530 for (i = 0; i < cpuid->nproc; i++)
532 idx = (cpuid->package_id[i]*cpuid->ncores_per_package + cpuid->core_id[i])*cpuid->nhwthreads_per_core + cpuid->hwthread_id[i];
533 cpuid->locality_order[idx] = i;
539 /* Detection of AMD-specific CPU features */
541 cpuid_check_amd_x86(gmx_cpuid_t cpuid)
543 int max_stdfn, max_extfn, ret;
544 unsigned int eax, ebx, ecx, edx;
545 int hwthread_bits, core_bits;
548 cpuid_check_common_x86(cpuid);
550 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
553 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
556 if (max_extfn >= 0x80000001)
558 execute_x86cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
560 cpuid->feature[GMX_CPUID_FEATURE_X86_SSE4A] = (ecx & (1 << 6)) != 0;
561 cpuid->feature[GMX_CPUID_FEATURE_X86_MISALIGNSSE] = (ecx & (1 << 7)) != 0;
562 cpuid->feature[GMX_CPUID_FEATURE_X86_XOP] = (ecx & (1 << 11)) != 0;
563 cpuid->feature[GMX_CPUID_FEATURE_X86_FMA4] = (ecx & (1 << 16)) != 0;
566 /* Query APIC information on AMD */
567 if (max_extfn >= 0x80000008)
569 #if (defined HAVE_SCHED_H && defined HAVE_SCHED_SETAFFINITY && defined HAVE_SYSCONF && defined __linux__)
572 cpu_set_t cpuset, save_cpuset;
573 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
574 apic_id = malloc(sizeof(int)*cpuid->nproc);
575 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
576 /* Get APIC id from each core */
578 for (i = 0; i < cpuid->nproc; i++)
581 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
582 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
583 apic_id[i] = ebx >> 24;
586 /* Reset affinity to the value it had when calling this routine */
587 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
588 #define CPUID_HAVE_APIC
589 #elif defined GMX_NATIVE_WINDOWS
593 unsigned int save_affinity, affinity;
594 GetSystemInfo( &sysinfo );
595 cpuid->nproc = sysinfo.dwNumberOfProcessors;
596 apic_id = malloc(sizeof(int)*cpuid->nproc);
597 /* Get previous affinity mask */
598 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
599 for (i = 0; i < cpuid->nproc; i++)
601 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
603 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
604 apic_id[i] = ebx >> 24;
606 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
607 #define CPUID_HAVE_APIC
609 #ifdef CPUID_HAVE_APIC
610 /* AMD does not support SMT yet - there are no hwthread bits in apic ID */
612 /* Get number of core bits in apic ID - try modern extended method first */
613 execute_x86cpuid(0x80000008, 0, &eax, &ebx, &ecx, &edx);
614 core_bits = (ecx >> 12) & 0xf;
617 /* Legacy method for old single/dual core AMD CPUs */
619 for (core_bits = 0; (i>>core_bits) > 0; core_bits++)
624 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
626 cpuid->have_cpu_topology = (ret == 0);
632 /* Detection of Intel-specific CPU features */
634 cpuid_check_intel_x86(gmx_cpuid_t cpuid)
636 unsigned int max_stdfn, max_extfn, ret;
637 unsigned int eax, ebx, ecx, edx;
638 unsigned int max_logical_cores, max_physical_cores;
639 int hwthread_bits, core_bits;
642 cpuid_check_common_x86(cpuid);
644 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
647 execute_x86cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
652 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
653 cpuid->feature[GMX_CPUID_FEATURE_X86_PDCM] = (ecx & (1 << 15)) != 0;
654 cpuid->feature[GMX_CPUID_FEATURE_X86_PCID] = (ecx & (1 << 17)) != 0;
655 cpuid->feature[GMX_CPUID_FEATURE_X86_X2APIC] = (ecx & (1 << 21)) != 0;
656 cpuid->feature[GMX_CPUID_FEATURE_X86_TDT] = (ecx & (1 << 24)) != 0;
661 execute_x86cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
662 cpuid->feature[GMX_CPUID_FEATURE_X86_AVX2] = (ebx & (1 << 5)) != 0;
665 /* Check whether Hyper-Threading is enabled, not only supported */
666 if (cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] && max_stdfn >= 4)
668 execute_x86cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
669 max_logical_cores = (ebx >> 16) & 0x0FF;
670 execute_x86cpuid(0x4, 0, &eax, &ebx, &ecx, &edx);
671 max_physical_cores = ((eax >> 26) & 0x3F) + 1;
673 /* Clear HTT flag if we only have 1 logical core per physical */
674 if (max_logical_cores/max_physical_cores < 2)
676 cpuid->feature[GMX_CPUID_FEATURE_X86_HTT] = 0;
680 if (max_stdfn >= 0xB)
682 /* Query x2 APIC information from cores */
683 #if (defined HAVE_SCHED_H && defined HAVE_SCHED_SETAFFINITY && defined HAVE_SYSCONF && defined __linux__)
686 cpu_set_t cpuset, save_cpuset;
687 cpuid->nproc = sysconf(_SC_NPROCESSORS_ONLN);
688 apic_id = malloc(sizeof(int)*cpuid->nproc);
689 sched_getaffinity(0, sizeof(cpu_set_t), &save_cpuset);
690 /* Get x2APIC ID from each hardware thread */
692 for (i = 0; i < cpuid->nproc; i++)
695 sched_setaffinity(0, sizeof(cpu_set_t), &cpuset);
696 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
700 /* Reset affinity to the value it had when calling this routine */
701 sched_setaffinity(0, sizeof(cpu_set_t), &save_cpuset);
702 #define CPUID_HAVE_APIC
703 #elif defined GMX_NATIVE_WINDOWS
707 unsigned int save_affinity, affinity;
708 GetSystemInfo( &sysinfo );
709 cpuid->nproc = sysinfo.dwNumberOfProcessors;
710 apic_id = malloc(sizeof(int)*cpuid->nproc);
711 /* Get previous affinity mask */
712 save_affinity = SetThreadAffinityMask(GetCurrentThread(), 1);
713 for (i = 0; i < cpuid->nproc; i++)
715 SetThreadAffinityMask(GetCurrentThread(), (((DWORD_PTR)1)<<i));
717 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
720 SetThreadAffinityMask(GetCurrentThread(), save_affinity);
721 #define CPUID_HAVE_APIC
723 #ifdef CPUID_HAVE_APIC
724 execute_x86cpuid(0xB, 0, &eax, &ebx, &ecx, &edx);
725 hwthread_bits = eax & 0x1F;
726 execute_x86cpuid(0xB, 1, &eax, &ebx, &ecx, &edx);
727 core_bits = (eax & 0x1F) - hwthread_bits;
728 ret = cpuid_x86_decode_apic_id(cpuid, apic_id, core_bits,
730 cpuid->have_cpu_topology = (ret == 0);
735 #endif /* GMX_CPUID_X86 */
741 chomp_substring_before_colon(const char *in, char *s, int maxlength)
744 strncpy(s,in,maxlength);
749 while(isspace(*(--p)) && (p>=s))
761 chomp_substring_after_colon(const char *in, char *s, int maxlength)
764 if( (p = strchr(in,':'))!=NULL)
767 while(isspace(*p)) p++;
768 strncpy(s,p,maxlength);
770 while(isspace(*(--p)) && (p>=s))
781 /* Try to find the vendor of the current CPU, so we know what specific
782 * detection routine to call.
784 static enum gmx_cpuid_vendor
785 cpuid_check_vendor(void)
787 enum gmx_cpuid_vendor i, vendor;
788 /* Register data used on x86 */
789 unsigned int eax, ebx, ecx, edx;
790 char vendorstring[13];
792 char buffer[255],before_colon[255], after_colon[255];
794 /* Set default first */
795 vendor = GMX_CPUID_VENDOR_UNKNOWN;
798 execute_x86cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
800 memcpy(vendorstring, &ebx, 4);
801 memcpy(vendorstring+4, &edx, 4);
802 memcpy(vendorstring+8, &ecx, 4);
804 vendorstring[12] = '\0';
806 for (i = GMX_CPUID_VENDOR_UNKNOWN; i < GMX_CPUID_NVENDORS; i++)
808 if (!strncmp(vendorstring, gmx_cpuid_vendor_string[i], 12))
813 #elif defined(__linux__) || defined(__linux)
814 /* General Linux. Try to get CPU vendor from /proc/cpuinfo */
815 if( (fp = fopen("/proc/cpuinfo","r")) != NULL)
817 while( (vendor == GMX_CPUID_VENDOR_UNKNOWN) && (fgets(buffer,sizeof(buffer),fp) != NULL))
819 chomp_substring_before_colon(buffer,before_colon,sizeof(before_colon));
820 /* Intel/AMD use "vendor_id", IBM "vendor"(?) or "model". Fujitsu "manufacture". Add others if you have them! */
821 if( !strcmp(before_colon,"vendor_id")
822 || !strcmp(before_colon,"vendor")
823 || !strcmp(before_colon,"manufacture")
824 || !strcmp(before_colon,"model"))
826 chomp_substring_after_colon(buffer,after_colon,sizeof(after_colon));
827 for(i=GMX_CPUID_VENDOR_UNKNOWN; i<GMX_CPUID_NVENDORS; i++)
829 /* Be liberal and accept if we find the vendor
830 * string (or alternative string) anywhere. Using
831 * strcasestr() would be non-portable. */
832 if(strstr(after_colon,gmx_cpuid_vendor_string[i])
833 || strstr(after_colon,gmx_cpuid_vendor_string_alternative[i]))
843 vendor = GMX_CPUID_VENDOR_UNKNOWN;
852 gmx_cpuid_topology(gmx_cpuid_t cpuid,
855 int * ncores_per_package,
856 int * nhwthreads_per_core,
857 const int ** package_id,
858 const int ** core_id,
859 const int ** hwthread_id,
860 const int ** locality_order)
864 if (cpuid->have_cpu_topology)
866 *nprocessors = cpuid->nproc;
867 *npackages = cpuid->npackages;
868 *ncores_per_package = cpuid->ncores_per_package;
869 *nhwthreads_per_core = cpuid->nhwthreads_per_core;
870 *package_id = cpuid->package_id;
871 *core_id = cpuid->core_id;
872 *hwthread_id = cpuid->hwthread_id;
873 *locality_order = cpuid->locality_order;
884 enum gmx_cpuid_x86_smt
885 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid)
887 enum gmx_cpuid_x86_smt rc;
889 if (cpuid->have_cpu_topology)
891 rc = (cpuid->nhwthreads_per_core > 1) ? GMX_CPUID_X86_SMT_ENABLED : GMX_CPUID_X86_SMT_DISABLED;
893 else if (cpuid->vendor == GMX_CPUID_VENDOR_AMD || gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_HTT) == 0)
895 rc = GMX_CPUID_X86_SMT_DISABLED;
899 rc = GMX_CPUID_X86_SMT_CANNOTDETECT;
906 gmx_cpuid_init (gmx_cpuid_t * pcpuid)
911 char buffer[255],buffer2[255];
914 cpuid = malloc(sizeof(*cpuid));
918 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
920 cpuid->feature[i] = 0;
923 cpuid->have_cpu_topology = 0;
925 cpuid->npackages = 0;
926 cpuid->ncores_per_package = 0;
927 cpuid->nhwthreads_per_core = 0;
928 cpuid->package_id = NULL;
929 cpuid->core_id = NULL;
930 cpuid->hwthread_id = NULL;
931 cpuid->locality_order = NULL;
933 cpuid->vendor = cpuid_check_vendor();
935 switch (cpuid->vendor)
938 case GMX_CPUID_VENDOR_INTEL:
939 cpuid_check_intel_x86(cpuid);
941 case GMX_CPUID_VENDOR_AMD:
942 cpuid_check_amd_x86(cpuid);
947 strncpy(cpuid->brand,"Unknown CPU brand",GMX_CPUID_BRAND_MAXLEN);
948 #if defined(__linux__) || defined(__linux)
949 /* General Linux. Try to get CPU type from /proc/cpuinfo */
950 if( (fp = fopen("/proc/cpuinfo","r")) != NULL)
953 while( (found_brand==0) && (fgets(buffer,sizeof(buffer),fp) !=NULL))
955 chomp_substring_before_colon(buffer,buffer2,sizeof(buffer2));
956 /* Intel uses "model name", Fujitsu and IBM "cpu". */
957 if( !strcmp(buffer2,"model name") || !strcmp(buffer2,"cpu"))
959 chomp_substring_after_colon(buffer,cpuid->brand,GMX_CPUID_BRAND_MAXLEN);
970 for(i=0; i<GMX_CPUID_NFEATURES; i++)
974 cpuid->feature[GMX_CPUID_FEATURE_CANNOTDETECT] = 1;
983 gmx_cpuid_done (gmx_cpuid_t cpuid)
990 gmx_cpuid_formatstring (gmx_cpuid_t cpuid,
996 enum gmx_cpuid_feature feature;
1002 "Family: %2d Model: %2d Stepping: %2d\n"
1004 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1005 gmx_cpuid_brand(cpuid),
1006 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1011 "Family: %2d Model: %2d Stepping: %2d\n"
1013 gmx_cpuid_vendor_string[gmx_cpuid_vendor(cpuid)],
1014 gmx_cpuid_brand(cpuid),
1015 gmx_cpuid_family(cpuid), gmx_cpuid_model(cpuid), gmx_cpuid_stepping(cpuid));
1023 for (feature = GMX_CPUID_FEATURE_CANNOTDETECT; feature < GMX_CPUID_NFEATURES; feature++)
1025 if (gmx_cpuid_feature(cpuid, feature) == 1)
1028 _snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1030 snprintf(str, n, " %s", gmx_cpuid_feature_string[feature]);
1039 _snprintf(str, n, "\n");
1041 snprintf(str, n, "\n");
1050 enum gmx_cpuid_acceleration
1051 gmx_cpuid_acceleration_suggest (gmx_cpuid_t cpuid)
1053 enum gmx_cpuid_acceleration tmpacc;
1055 tmpacc = GMX_CPUID_ACCELERATION_NONE;
1057 if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_INTEL)
1059 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1061 tmpacc = GMX_CPUID_ACCELERATION_X86_AVX_256;
1063 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1065 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
1067 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1069 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE2;
1072 else if (gmx_cpuid_vendor(cpuid) == GMX_CPUID_VENDOR_AMD)
1074 if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_AVX))
1076 tmpacc = GMX_CPUID_ACCELERATION_X86_AVX_128_FMA;
1078 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE4_1))
1080 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE4_1;
1082 else if (gmx_cpuid_feature(cpuid, GMX_CPUID_FEATURE_X86_SSE2))
1084 tmpacc = GMX_CPUID_ACCELERATION_X86_SSE2;
1087 else if(gmx_cpuid_vendor(cpuid)==GMX_CPUID_VENDOR_FUJITSU)
1089 if(strstr(gmx_cpuid_brand(cpuid),"SPARC64"))
1091 tmpacc = GMX_CPUID_ACCELERATION_SPARC64_HPC_ACE;
1094 else if(gmx_cpuid_vendor(cpuid)==GMX_CPUID_VENDOR_IBM)
1096 if(strstr(gmx_cpuid_brand(cpuid),"A2"))
1098 tmpacc = GMX_CPUID_ACCELERATION_IBM_QPX;
1107 gmx_cpuid_acceleration_check(gmx_cpuid_t cpuid,
1112 enum gmx_cpuid_acceleration acc;
1114 acc = gmx_cpuid_acceleration_suggest(cpuid);
1116 rc = (acc != compiled_acc);
1118 gmx_cpuid_formatstring(cpuid, str, 1023);
1124 "\nDetecting CPU-specific acceleration.\nPresent hardware specification:\n"
1126 "Acceleration most likely to fit this hardware: %s\n"
1127 "Acceleration selected at GROMACS compile time: %s\n\n",
1129 gmx_cpuid_acceleration_string[acc],
1130 gmx_cpuid_acceleration_string[compiled_acc]);
1137 fprintf(log, "\nBinary not matching hardware - you might be losing performance.\n"
1138 "Acceleration most likely to fit this hardware: %s\n"
1139 "Acceleration selected at GROMACS compile time: %s\n\n",
1140 gmx_cpuid_acceleration_string[acc],
1141 gmx_cpuid_acceleration_string[compiled_acc]);
1143 printf("Compiled acceleration: %s (Gromacs could use %s on this machine, which is better)\n",
1144 gmx_cpuid_acceleration_string[compiled_acc],
1145 gmx_cpuid_acceleration_string[acc]);
1151 #ifdef GMX_CPUID_STANDALONE
1152 /* Stand-alone program to enable queries of CPU features from Cmake.
1153 * Note that you need to check inline ASM capabilities before compiling and set
1154 * -DGMX_X86_GCC_INLINE_ASM for the cpuid instruction to work...
1157 main(int argc, char **argv)
1160 enum gmx_cpuid_acceleration acc;
1166 "Usage:\n\n%s [flags]\n\n"
1167 "Available flags:\n"
1168 "-vendor Print CPU vendor.\n"
1169 "-brand Print CPU brand string.\n"
1170 "-family Print CPU family version.\n"
1171 "-model Print CPU model version.\n"
1172 "-stepping Print CPU stepping version.\n"
1173 "-features Print CPU feature flags.\n"
1174 "-acceleration Print suggested GROMACS acceleration.\n",
1179 gmx_cpuid_init(&cpuid);
1181 if (!strncmp(argv[1], "-vendor", 3))
1183 printf("%s\n", gmx_cpuid_vendor_string[cpuid->vendor]);
1185 else if (!strncmp(argv[1], "-brand", 3))
1187 printf("%s\n", cpuid->brand);
1189 else if (!strncmp(argv[1], "-family", 3))
1191 printf("%d\n", cpuid->family);
1193 else if (!strncmp(argv[1], "-model", 3))
1195 printf("%d\n", cpuid->model);
1197 else if (!strncmp(argv[1], "-stepping", 3))
1199 printf("%d\n", cpuid->stepping);
1201 else if (!strncmp(argv[1], "-features", 3))
1204 for (i = 0; i < GMX_CPUID_NFEATURES; i++)
1206 if (cpuid->feature[i] == 1)
1212 printf("%s", gmx_cpuid_feature_string[i]);
1217 else if (!strncmp(argv[1], "-acceleration", 3))
1219 acc = gmx_cpuid_acceleration_suggest(cpuid);
1220 fprintf(stdout, "%s\n", gmx_cpuid_acceleration_string[acc]);
1223 gmx_cpuid_done(cpuid);