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35 #ifndef _gmx_x86_simd256_single_h_
36 #define _gmx_x86_simd256_single_h_
38 /* This file includes the highest possible level of x86 (math) acceleration */
40 #ifdef GMX_X86_AVX_256
41 #include "gmx_x86_avx_256.h"
42 #include "gmx_math_x86_avx_256_single.h"
44 #ifdef GMX_X86_AVX_128_FMA
45 #include "gmx_x86_avx_128_fma.h"
46 #include "gmx_math_x86_avx_128_fma_single.h"
49 #include "gmx_x86_sse4_1.h"
50 #include "gmx_math_x86_sse4_1_single.h"
53 #include "gmx_x86_sse2.h"
54 #include "gmx_math_x86_sse2_single.h"
56 #error No x86 acceleration defined
64 gmx_mm_calc_rsq_ps(__m128 dx, __m128 dy, __m128 dz)
66 return _mm_add_ps( _mm_add_ps( _mm_mul_ps(dx, dx), _mm_mul_ps(dy, dy) ), _mm_mul_ps(dz, dz) );
69 /* Normal sum of four __m128 registers */
70 #define gmx_mm_sum4_ps(t0, t1, t2, t3) _mm_add_ps(_mm_add_ps(t0, t1), _mm_add_ps(t2, t3))
72 #ifdef GMX_X86_AVX_256
75 gmx_mm256_calc_rsq_ps(__m256 dx, __m256 dy, __m256 dz)
77 return _mm256_add_ps( _mm256_add_ps( _mm256_mul_ps(dx, dx), _mm256_mul_ps(dy, dy) ), _mm256_mul_ps(dz, dz) );
80 /* Normal sum of four __m256 registers */
81 #define gmx_mm256_sum4_ps(t0, t1, t2, t3) _mm256_add_ps(_mm256_add_ps(t0, t1), _mm256_add_ps(t2, t3))
85 #endif /* _gmx_x86_simd256_single_h_ */