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35 include(gmxFindFlagsForSource)
37 # Macro that manages setting the respective C and C++ toolchain
38 # variables so that subsequent tests for SIMD support can work.
39 macro(prepare_x86_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
40 # On OS X, we often want to use gcc instead of clang, since gcc
41 # supports OpenMP (until clang 3.8, or so, plus whenever Apple
42 # support it in their version). However, by default gcc uses the
43 # external system assembler, which does not support AVX, so we
44 # need to tell the linker to use the clang compilers assembler
45 # instead - and this has to happen before we detect AVX flags.
46 if(APPLE AND CMAKE_C_COMPILER_ID STREQUAL "GNU")
47 gmx_test_cflag(GNU_C_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_C_FLAGS_VARIABLE})
49 if(APPLE AND CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
50 gmx_test_cxxflag(GNU_CXX_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
54 # Macro that manages setting the respective C and C++ toolchain
55 # variables so that subsequent tests for SIMD support can work.
56 macro(prepare_power_vsx_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
57 if(${CMAKE_CXX_COMPILER_ID} MATCHES "GNU" OR ${CMAKE_C_COMPILER_ID} MATCHES "GNU")
58 # VSX uses the same function API as Altivec/VMX, so make sure we tune for the current CPU and not VMX.
59 # By putting these flags here rather than in the general compiler flags file we can safely assume
60 # that we are at least on Power7 since that is when VSX appeared.
61 if(BUILD_CPU_BRAND MATCHES "POWER7")
62 gmx_test_cflag(GNU_C_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_C_FLAGS_VARIABLE})
63 gmx_test_cflag(GNU_CXX_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
65 # Enable power8 vector extensions on all platforms except old Power7.
66 gmx_test_cflag(GNU_C_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_C_FLAGS_VARIABLE})
67 gmx_test_cflag(GNU_CXX_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
69 # Altivec was originally single-only, and it took a while for compilers
70 # to support the double-precision features in VSX.
71 if(GMX_DOUBLE AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9")
72 message(FATAL_ERROR "Using VSX SIMD in double precision with GCC requires GCC-4.9 or later.")
75 if(${CMAKE_CXX_COMPILER_ID} MATCHES "XL" OR ${CMAKE_C_COMPILER_ID} MATCHES "XL")
76 if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS "13.1.5" OR CMAKE_C_COMPILER_VERSION VERSION_LESS "13.1.5")
77 message(FATAL_ERROR "Using VSX SIMD requires XL compiler version 13.1.5 or later.")
82 # Issue a fatal error with an appropriate message, when the toolchain
83 # was not able to compile code for SIMD support.
86 # SIMD_STRING A string describing the kind of SIMD support that didn't work.
87 # ALTERNATIVE_SUGGESTION A string describing anything the user could try other than getting a new compiler.
88 # SUGGEST_BINUTILS_UPDATE True when there's information that the compiler was OK, but something else was not.
89 function(gmx_give_fatal_error_when_simd_support_not_found SIMD_STRING ALTERNATIVE_SUGGESTION SUGGEST_BINUTILS_UPDATE)
90 if(SUGGEST_BINUTILS_UPDATE)
91 set(_msg "Found a compiler flag for ${SIMD_STRING} support, but some other problem exists. Update your assembler and/or linker, e.g. in the binutils package of your distribution.")
93 set(_msg "Cannot find ${SIMD_STRING} compiler flag. Use a newer compiler, or ${ALTERNATIVE_SUGGESTION}.")
95 message(FATAL_ERROR ${_msg})
98 macro(gmx_manage_simd)
100 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math")
102 # Note that we typically restrict double precision target accuracy to be twice that
103 # of single. This means we only need one more N-R iteration for 1/sqrt(x) and 1(x),
104 # and the first iteration can sometimes be done as a pair in single precision. This should
105 # be plenty enough for Molecular Dynamics applications. Many of our double precision math
106 # functions still achieve very close to full double precision, but we do not guarantee that
107 # they will be able to achieve higher accuracy if you set this beyond 44 bits. GROMACS will
108 # work - but some unit tests might fail.
110 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 44 CACHE STRING "Target mantissa bits for SIMD double math")
111 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_SINGLE)
112 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_DOUBLE)
114 if(${GMX_SIMD_ACCURACY_BITS_SINGLE} GREATER 22)
115 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD single math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 22 bits.")
116 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math" FORCE)
119 if(${GMX_SIMD_ACCURACY_BITS_DOUBLE} GREATER 51)
120 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD double math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 51 bits.")
121 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 51 CACHE STRING "Target mantissa bits for SIMD double math" FORCE)
125 # Section to set (and test) compiler flags for SIMD.
127 # The flags will be set based on the GMX_SIMD choice provided by the user.
128 # Automatic detection of the architecture on the build host is done prior to
129 # calling this macro.
132 if(GMX_SIMD STREQUAL "NONE")
133 # nothing to do configuration-wise
134 set(SIMD_STATUS_MESSAGE "SIMD instructions disabled")
135 elseif(GMX_SIMD STREQUAL "SSE2")
138 "#include<xmmintrin.h>
139 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return _mm_movemask_ps(x);}"
140 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
141 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
142 "-msse2" "/arch:SSE2" "-hgnu")
144 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
145 gmx_give_fatal_error_when_simd_support_not_found("SSE2" "disable SIMD support (slow)" "${SUGGEST_BINUTILS_UPDATE}")
148 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
149 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
150 set(GMX_SIMD_X86_${GMX_SIMD} 1)
151 set(SIMD_STATUS_MESSAGE "Enabling SSE2 SIMD instructions")
153 elseif(GMX_SIMD STREQUAL "SSE4.1")
155 # Note: MSVC enables SSE4.1 with the SSE2 flag, so we include that in testing.
157 "#include<smmintrin.h>
158 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return _mm_movemask_ps(x);}"
159 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
160 SIMD_SSE_4_1_C_FLAGS SIMD_SSE_4_1_CXX_FLAGS
161 "-msse4.1" "/arch:SSE4.1" "/arch:SSE2" "-hgnu")
163 if(NOT SIMD_SSE_4_1_C_FLAGS OR NOT SIMD_SSE_4_1_CXX_FLAGS)
164 gmx_give_fatal_error_when_simd_support_not_found("SSE4.1" "choose SSE2 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
167 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
168 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
169 set(GMX_SIMD_X86_SSE4_1 1)
170 set(SIMD_STATUS_MESSAGE "Enabling SSE4.1 SIMD instructions")
172 elseif(GMX_SIMD STREQUAL "AVX_128_FMA")
174 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
176 # We don't have the full compiler version string yet (BUILD_C_COMPILER),
177 # so we can't distinguish vanilla from Apple clang versions, but catering for a few rare AMD
178 # hackintoshes is not worth the effort.
179 if (APPLE AND (CMAKE_C_COMPILER_ID STREQUAL "Clang" OR
180 CMAKE_CXX_COMPILER_ID STREQUAL "Clang"))
181 message(WARNING "Due to a known compiler bug, Clang up to version 3.2 (and Apple Clang up to version 4.1) produces incorrect code with AVX_128_FMA SIMD. As we cannot work around this bug on OS X, you will have to select a different compiler or SIMD instruction set.")
184 # clang <=3.2 contains a bug that causes incorrect code to be generated for the
185 # vfmaddps instruction and therefore the bug is triggered with AVX_128_FMA.
186 # (see: http://llvm.org/bugs/show_bug.cgi?id=15040).
187 # We can work around this by not using the integrated assembler (except on OS X
188 # which has an outdated assembler that does not support AVX instructions).
189 if (CMAKE_C_COMPILER_ID MATCHES "Clang" AND CMAKE_C_COMPILER_VERSION VERSION_LESS "3.3")
190 # we assume that we have an external assembler that supports AVX
191 message(STATUS "Clang ${CMAKE_C_COMPILER_VERSION} detected, enabling FMA bug workaround")
192 set(TOOLCHAIN_C_FLAGS "${TOOLCHAIN_C_FLAGS} -no-integrated-as")
194 if (CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "3.3")
195 # we assume that we have an external assembler that supports AVX
196 message(STATUS "Clang ${CMAKE_CXX_COMPILER_VERSION} detected, enabling FMA bug workaround")
197 set(TOOLCHAIN_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS} -no-integrated-as")
200 # AVX128/FMA on AMD is a bit complicated. We need to do detection in three stages:
201 # 1) Find the flags required for generic AVX support
202 # 2) Find the flags necessary to enable fused-multiply add support
203 # 3) Optional: Find a flag to enable the AMD XOP instructions
205 ### STAGE 1: Find the generic AVX flag
207 "#include<immintrin.h>
208 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_permute_ps(x,1);return 0;}"
209 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
210 SIMD_GENERIC_AVX_C_FLAGS SIMD_GENERIC_AVX_CXX_FLAGS
211 "-mavx" "/arch:AVX" "-hgnu")
213 ### STAGE 2: Find the fused-multiply add flag.
214 # GCC requires x86intrin.h for FMA support. MSVC 2010 requires intrin.h for FMA support.
215 check_include_file(x86intrin.h HAVE_X86INTRIN_H ${SIMD_C_FLAGS})
216 check_include_file(intrin.h HAVE_INTRIN_H ${SIMD_C_FLAGS})
218 set(INCLUDE_X86INTRIN_H "#include <x86intrin.h>")
221 set(INCLUDE_INTRIN_H "#include <xintrin.h>")
225 "#include<immintrin.h>
226 ${INCLUDE_X86INTRIN_H}
228 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return _mm_movemask_ps(x);}"
229 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
230 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
233 # We only need to check the last (FMA) test; that will always fail if the generic AVX test failed
234 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
235 gmx_give_fatal_error_when_simd_support_not_found("128-bit AVX with FMA support" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
238 ### STAGE 3: Optional: Find the XOP instruction flag (No point in yelling if this does not work)
240 "#include<immintrin.h>
241 ${INCLUDE_X86INTRIN_H}
243 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return _mm_movemask_ps(x);}"
244 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
245 SIMD_AVX_128_XOP_C_FLAGS SIMD_AVX_128_XOP_CXX_FLAGS
248 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
249 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
250 set(GMX_SIMD_X86_${GMX_SIMD} 1)
251 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX SIMD GROMACS SIMD (with fused-multiply add)")
253 elseif(GMX_SIMD STREQUAL "AVX_256")
255 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
258 "#include<immintrin.h>
259 int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return _mm256_movemask_ps(x);}"
260 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
261 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
262 "-mavx" "/arch:AVX" "-hgnu")
264 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
265 gmx_give_fatal_error_when_simd_support_not_found("AVX" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
268 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
269 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
270 set(GMX_SIMD_X86_${GMX_SIMD} 1)
271 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX SIMD instructions")
273 elseif(GMX_SIMD MATCHES "AVX2_")
275 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
278 "#include<immintrin.h>
279 int main(){__m256i x=_mm256_set1_epi32(5);x=_mm256_add_epi32(x,x);return _mm256_movemask_epi8(x);}"
280 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
281 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
282 "-march=core-avx2" "-mavx2" "/arch:AVX" "-hgnu") # no AVX2-specific flag for MSVC yet
284 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
285 gmx_give_fatal_error_when_simd_support_not_found("AVX2" "choose AVX SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
288 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
289 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
290 set(GMX_SIMD_X86_${GMX_SIMD} 1)
292 if(GMX_SIMD STREQUAL "AVX2_128")
293 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX2 SIMD instructions")
295 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX2 SIMD instructions")
298 elseif(GMX_SIMD STREQUAL "MIC")
300 # No flags needed. Not testing.
301 set(GMX_SIMD_X86_MIC 1)
302 set(SIMD_STATUS_MESSAGE "Enabling MIC (Xeon Phi) SIMD instructions")
304 elseif(GMX_SIMD STREQUAL "AVX_512")
306 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
309 "#include<immintrin.h>
310 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_fmadd_ps(x,x,x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
311 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
312 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
313 "-xCORE-AVX512" "-mavx512f -mfma" "-mavx512f" "/arch:AVX" "-hgnu") # no AVX_512F flags known for MSVC yet
315 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
316 gmx_give_fatal_error_when_simd_support_not_found("AVX 512F" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
319 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
320 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
321 set(GMX_SIMD_X86_${GMX_SIMD} 1)
322 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512 SIMD instructions")
324 elseif(GMX_SIMD STREQUAL "AVX_512_KNL")
326 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
329 "#include<immintrin.h>
330 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_rsqrt28_ps(x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
331 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
332 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
333 "-xMIC-AVX512" "-mavx512er -mfma" "-mavx512er" "/arch:AVX" "-hgnu") # no AVX_512ER flags known for MSVC yet
335 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
336 gmx_give_fatal_error_when_simd_support_not_found("AVX 512ER" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
339 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
340 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
341 set(GMX_SIMD_X86_${GMX_SIMD} 1)
342 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512-KNL SIMD instructions")
344 elseif(GMX_SIMD STREQUAL "ARM_NEON")
347 "#include<arm_neon.h>
348 int main(){float32x4_t x=vdupq_n_f32(0.5);x=vmlaq_f32(x,x,x);return vgetq_lane_f32(x,0)>0;}"
349 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
350 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
351 "-mfpu=neon-vfpv4" "-mfpu=neon" "")
353 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
354 gmx_give_fatal_error_when_simd_support_not_found("ARM NEON" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
357 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
358 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
359 set(GMX_SIMD_${GMX_SIMD} 1)
360 set(SIMD_STATUS_MESSAGE "Enabling 32-bit ARM NEON SIMD instructions")
362 elseif(GMX_SIMD STREQUAL "ARM_NEON_ASIMD")
365 "#include<arm_neon.h>
366 int main(){float64x2_t x=vdupq_n_f64(0.5);x=vfmaq_f64(x,x,x);x=vrndnq_f64(x);return vgetq_lane_f64(x,0)>0;}"
367 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
368 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
371 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
372 gmx_give_fatal_error_when_simd_support_not_found("ARM (AArch64) NEON Advanced SIMD" "particularly gcc version 4.9 or later, or disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
375 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
376 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
377 set(GMX_SIMD_${GMX_SIMD} 1)
378 set(SIMD_STATUS_MESSAGE "Enabling ARM (AArch64) NEON Advanced SIMD instructions")
380 elseif(GMX_SIMD STREQUAL "IBM_QPX")
382 try_compile(TEST_QPX ${CMAKE_BINARY_DIR}
383 "${CMAKE_SOURCE_DIR}/cmake/TestQPX.c")
386 message(WARNING "IBM QPX SIMD instructions selected. This will work, but SIMD kernels are only available for the Verlet cut-off scheme. The plain C kernels that are used for the group cut-off scheme kernels will be slow, so please consider using the Verlet cut-off scheme.")
387 set(GMX_SIMD_${GMX_SIMD} 1)
388 set(SIMD_STATUS_MESSAGE "Enabling IBM QPX SIMD instructions")
391 gmx_give_fatal_error_when_simd_support_not_found("IBM QPX" "or 'cmake .. -DCMAKE_TOOLCHAIN_FILE=Platform/BlueGeneQ-static-bgclang-CXX' to set up the tool chain" "${SUGGEST_BINUTILS_UPDATE}")
394 elseif(GMX_SIMD STREQUAL "IBM_VMX")
398 int main(){vector float x,y=vec_ctf(vec_splat_s32(1),0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
399 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
400 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
401 "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
403 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
404 gmx_give_fatal_error_when_simd_support_not_found("IBM VMX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
407 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
408 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
409 set(GMX_SIMD_${GMX_SIMD} 1)
410 set(SIMD_STATUS_MESSAGE "Enabling IBM VMX SIMD instructions")
412 elseif(GMX_SIMD STREQUAL "IBM_VSX")
414 prepare_power_vsx_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
418 int main(){vector double x,y=vec_splats(1.0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
419 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
420 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
421 "-mvsx" "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
423 # Usually we check also for the C compiler here, but a C compiler
424 # is not required for SIMD support on this platform. cmake through
425 # at least version 3.7 cannot pass this check with the C compiler
426 # in the latest xlc 13.1.5, but the C++ compiler has different
427 # behaviour and is OK. See Redmine #2102.
428 if(NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
429 gmx_give_fatal_error_when_simd_support_not_found("IBM VSX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
432 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
433 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
434 set(GMX_SIMD_${GMX_SIMD} 1)
435 set(SIMD_STATUS_MESSAGE "Enabling IBM VSX SIMD instructions")
437 elseif(GMX_SIMD STREQUAL "SPARC64_HPC_ACE")
439 # Note that GMX_RELAXED_DOUBLE_PRECISION is enabled by default in the top-level CMakeLists.txt
441 set(GMX_SIMD_${GMX_SIMD} 1)
442 set(SIMD_STATUS_MESSAGE "Enabling Sparc64 HPC-ACE SIMD instructions")
444 elseif(GMX_SIMD STREQUAL "REFERENCE")
446 # NB: This file handles settings for the SIMD module, so in the interest
447 # of proper modularization, please do NOT put any verlet kernel settings in this file.
449 if(GMX_SIMD_REF_FLOAT_WIDTH)
450 add_definitions(-DGMX_SIMD_REF_FLOAT_WIDTH=${GMX_SIMD_REF_FLOAT_WIDTH})
452 if(GMX_SIMD_REF_DOUBLE_WIDTH)
453 add_definitions(-DGMX_SIMD_REF_DOUBLE_WIDTH=${GMX_SIMD_REF_DOUBLE_WIDTH})
456 set(GMX_SIMD_${GMX_SIMD} 1)
457 set(SIMD_STATUS_MESSAGE "Enabling reference (emulated) SIMD instructions.")
460 gmx_invalid_option_value(GMX_SIMD)
464 gmx_check_if_changed(SIMD_CHANGED GMX_SIMD)
465 if (SIMD_CHANGED AND DEFINED SIMD_STATUS_MESSAGE)
466 message(STATUS "${SIMD_STATUS_MESSAGE}")
469 # By default, 32-bit windows cannot pass SIMD (SSE/AVX) arguments in registers,
470 # and even on 64-bit (all platforms) it is only used for a handful of arguments.
471 # The __vectorcall (MSVC, from MSVC2013) or __regcall (ICC) calling conventions
472 # enable this, which is critical to enable 32-bit SIMD and improves performance
474 # Check if the compiler supports one of these, and in that case set gmx_simdcall
475 # to that string. If we do not have any such calling convention modifier, set it
476 # to an empty string.
478 # Update 2015-11-04: As of version 3.6, clang has added support for __vectorcall
479 # (also on Linux). This appears to be buggy for the reference SIMD
480 # implementation when using the Debug build (when functions are not inlined)
481 # while it seems works fine for the actual SIMD implementations. This is likely
482 # because the reference build ends up passing lots of structures with arrays
483 # rather than actual vector data. For now we disable __vectorcall with clang
484 # when using the reference build.
486 # xlc 13.1.5 does not seem recognize any attribute, and warns about invalid ones
487 # so we avoid searching for any.
489 if(NOT DEFINED GMX_SIMD_CALLING_CONVENTION)
491 set(CALLCONV_LIST " ")
492 elseif(CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND GMX_SIMD STREQUAL "REFERENCE")
493 set(CALLCONV_LIST __regcall " ")
494 elseif(CMAKE_CXX_COMPILER_ID MATCHES "XL")
495 set(CALLCONV_LIST " ")
497 set(CALLCONV_LIST __vectorcall __regcall " ")
499 foreach(callconv ${CALLCONV_LIST})
500 set(callconv_compile_var "_callconv_${callconv}")
501 check_c_source_compiles("int ${callconv} f(int i) {return i;} int main(void) {return f(0);}" ${callconv_compile_var})
502 if(${callconv_compile_var})
503 set(GMX_SIMD_CALLING_CONVENTION "${callconv}" CACHE INTERNAL "Calling convention for SIMD routines" FORCE)